Active Bridge for Chiplet Inter-Communication
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In integrated circuit packaging, chiplets often require both short-reach and long-reach communication layers, which can be cumbersome and inefficient, especially when scaling analog components and utilizing smaller feature sizes, and there is a need for enhanced reliability and area efficiency in inter-chiplet and inter-module communications.
Innovation Solution
The implementation of an active bridge with a short-to-long converter circuit that includes both analog and digital portions, a selector switch for layer selection, and a built-in-self-test (BIST) circuit, allowing for efficient communication between chiplets and modules by separating the long-reach physical layer to the active bridge, freeing up space on chiplets for digital components and enhancing reliability through pre-assembly testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If chiplets include both short-reach and long-reach communication layers, then communication versatility is improved, but chiplet area and design complexity increase
Solution Approach 1:
The patent divides the long-reach communication functionality into separate segments: the analog portion is placed on the active bridge while the digital portion remains on the chiplet. This segmentation allows chiplets to maintain communication versatility through the analog portion on the bridge without dedicating significant area on the chiplet itself, thus resolving the contradiction between versatility and area usage.
Solution Approach 2:
The analog portion of the long-reach physical layer is extracted from the chiplet and placed on the active bridge. This extraction enables chiplets to achieve long-reach communication capability without incorporating the analog components that would consume valuable chiplet area, thereby maintaining versatility while reducing area requirements.
2Manufacturing precision
If analog components are scaled to smaller feature sizes, then chiplet integration density is improved, but manufacturing precision and reliability deteriorate
Solution Approach 1:
The active bridge serves as an intermediary component that hosts the analog portion of the long-reach physical layer. By placing analog components on the bridge rather than on the chiplet, the system can utilize smaller feature sizes on chiplets for digital components while the analog components on the bridge can be manufactured at larger, more reliable feature sizes, thus resolving the contradiction between scaling and reliability.
3Adaptability or versatility
If each chiplet includes complete long-reach physical layer, then communication independence is improved, but device complexity and area utilization worsen
Solution Approach 1:
The active bridge is designed as a universal component that provides long-reach communication functionality for multiple chiplets. Instead of each chiplet having its own complete long-reach physical layer, the shared active bridge with its analog portion serves multiple chiplets, reducing individual chiplet complexity while maintaining communication independence through the distributed architecture.
Data Source
AI summary
A semiconductor integrated circuit device includes: an active bridge; a first chiplet and a second chiplet mounted onto the active bridge; and a short-to-long converter circuit (SLCC) that has analog and digital portions. The active bridge includes at least the analog portion of the SLCC, which is electrically connected to at least the first chiplet; and a short-reach physical layer that electrically connects the first chiplet and the second chiplet. The first chiplet includes a first logic core; a first chiplet interface that is electrically connected between the first logic core and the SLCC; and a second chiplet interface that is electrically connected between the first logic core and the second chiplet. The second chiplet includes a second logic core; and a third chiplet interface that is electrically connected between the second logic core and the second chiplet interface. The active bridge also can include a built-in-self-test (BIST) circuit.