Active Clamp Gate Drive to Prevent False Turn-On

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Solution Overview

Problem

Conventional active clamp circuits in high power applications experience delays in signal feedback, leading to potential false turn-on of semiconductor switching devices due to increased energy injection, which affects the operating security and stability of power devices, especially in applications with fast switching speeds and small voltage margins.

Innovation Solution

A circuit comprising a power amplifier, control circuit, active clamp circuit, and suppression circuit with a controllable switch that clamps the input end of the power amplifier to a fixed potential after the active clamp circuit completes voltage clamping, effectively blocking interference signals and preventing false turn-on.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a capacitor is connected in parallel to the TVS Diode to increase displacement current and achieve timely voltage clamping, then the response speed of the active clamp circuit is improved, but the energy injected into the gate of IGBT is increased, causing false turn-on risk

Engineering Contradiction:
Improveresponse speedVSAvoidfalse turn-on risk
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The circuit is divided into two independent parts: the active clamp circuit for voltage clamping and the suppression circuit for false turn-on prevention. The suppression circuit includes a suppression capacitor connected in parallel to the TVS diode and a discharge resistor connected between the gate and emitter, separating the functions of voltage clamping and gate charge dissipation to eliminate the trade-off between response speed and reliability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The discharge resistor acts as an intermediary element that provides a dedicated path for gate charge dissipation. When the suppression capacitor injects displacement current to speed up voltage clamping, the discharge resistor simultaneously dissipates the accumulated gate charge, preventing false turn-on while maintaining the benefits of fast response

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If energy injection into the gate is increased to achieve better voltage clamping effect in fast switching applications, then the voltage clamping performance is improved, but the interference signal affecting the driving signal is increased, causing false turn-on

Engineering Contradiction:
Improvevoltage clamping performanceVSAvoidinterference signal
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The discharge resistor converts the harmful effect of accumulated gate charge (which causes false turn-on) into a beneficial dissipation path. By providing this controlled discharge path, the circuit can tolerate higher energy injection from the suppression capacitor while preventing the harmful accumulation of gate charge that would lead to false turn-on

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution ensures reliable turn-off of semiconductor switching devices by blocking interference signals, enhancing the operating security and stability of power devices, even in applications with fast switching speeds and small voltage margins, without affecting the normal operation of the active clamp circuit.

Implementation Method 1

When a collector-emitter voltage exceeds an active clamp threshold voltage, the TVS Diode 101 and the TVS Diode 102 are reversely breakdown, and an electric charge is injected into the gate 104 or the gate driving circuit

Methodology Applied
Scientific EffectReverse breakdown: Avalanche Breakdown

Implementation Method 2

Generally, a capacitor shall be connected in parallel to the TVS Diode in the conventional active clamp circuit, as shown in FIG. 2. Connecting the capacitor 106 in parallel to the TVS Diode may increase a displacement current

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 3

turning on the controllable switch, so that the input end of the power amplifier circuit is clamped to a fixed potential

Methodology Applied
Scientific EffectElectrical clamping: Electric Field

Data Source

PatentUS11824526B2Circuit and control method for preventing false turn-on of semiconductor switching device
Publication Date: 2023.11.21 DELTA ELECTRONICS (SHANGHAI) CO LTD
  • US11824526B2 patent drawing
  • US11824526B2 patent drawing
  • US11824526B2 patent drawing

AI summary

A circuit for preventing false turn-on of a semiconductor switching device includes an active clamp circuit, a control circuit, a power amplifier circuit, and a suppression circuit. The control circuit is coupled to an input of the power amplifier circuit. An output of the power amplifier circuit is coupled to a gate of the semiconductor switching device. The active clamp circuit is configured to operate within a preset period when a voltage between the first end of the semiconductor switching device and a second end of the semiconductor switching device is greater than a preset voltage. The suppression circuit includes a controllable switch, which is configured to turn on after the operation of the active clamp circuit is completed, such that potential at the input of the power amplifier circuit is clamped to a fixed potential.