Active Component Electrode Offset on Semi-Insulating Substrate
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Solution Overview
Problem
High bit rate operations in communication networks are hindered by parasitic capacitance and leakage current in optoelectronic devices due to insufficient electrical isolation between integrated components, leading to increased electrical capacitance and thermal resistance in existing technologies like Diode Ridge and Buried Ridge Strip technologies.
Innovation Solution
A device with monolithically integrated active components on a semi-insulating substrate, featuring a control electrode and ground electrode arrangement where the ground electrode is offset from the control electrode to minimize parasitic capacitance, and using proton implantation for local electrical isolation between components.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If active components are monolithically integrated on a semi-insulating substrate, then electrical isolation between components is improved and parasitic capacitance is reduced, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The device is segmented into multiple independently controlled active components (first active component and second active component) defined on the semi-insulating substrate. Each component has its own control electrode arrangement, allowing independent electrical control and isolation. This segmentation enables reduced parasitic capacitance between components while maintaining reliable electrical isolation through the semi-insulating substrate material.
Solution Approach 2:
The control electrode arrangements are positioned in specific locations relative to each active component, with ground electrodes offset from control electrodes to minimize parasitic capacitance. The semi-insulating substrate provides localized electrical isolation properties where needed between components, while maintaining overall device integration. This local optimization of electrode positioning and substrate properties reduces parasitic effects without requiring complete redesign of the entire device structure.
2Speed
If device size is reduced to achieve low capacitance, then bandwidth is improved, but parasitic capacitance and leakage current from substrates increase
Solution Approach 1:
The semi-insulating substrate acts as an intermediary layer between the active components and the underlying substrate structure. This semi-insulating layer provides electrical isolation that blocks parasitic capacitance and leakage current paths from the substrate to the active components, while still allowing the device to maintain a compact size for high bandwidth operation. The intermediary substrate layer effectively decouples the active components from harmful substrate effects.
3Ease of operation
If control electrode and ground electrode are positioned directly opposite each other, then control effectiveness is improved, but parasitic capacitance increases
Solution Approach 1:
The control electrode and ground electrode are positioned asymmetrically rather than directly opposite each other. The ground electrode is offset from the control electrode position, creating an asymmetric electrode arrangement that reduces the overlapping electric field lines between control and ground electrodes. This asymmetric positioning maintains sufficient control effectiveness over the active component while minimizing parasitic capacitance between the control and ground electrodes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration significantly reduces parasitic capacitance and leakage current, enabling effective high bit rate operations by controlling active components through control current or voltage, thereby improving electrical isolation and reducing device capacitance.
Implementation Method 1
semi-insulating substrate (SIS)... facilitates component electrical isolation and reduces capacitance in interconnections and bonding pads
Implementation Method 2
electrode arrangement (Eij) intended for controlling said component (Ci) by means of a control current or a control voltage
Implementation Method 3
one may proceed to a local electrical isolation of these etched vertical structures; the local electrical isolation may be carried out by means of a proton implantation in a part of at least each area that is located between the etched vertical structures
Data Source
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AI summary
A method of manufacturing and a device comprising at least one active component (C1, C2) onto a semi-insulating substrate (SIS) are disclosed. The method comprises defining onto this semi-insulating substrate (SIS), by monolithic integration, at least one active component (C1) with at least one electrode (E11-E22) intended for specifically controlling this active component (C1) by means of control current or control voltage.