Active Contact Structure With Stress Seed Layers for Scaled MOSFETs

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Solution Overview

Problem

The scale-down of metal-oxide-semiconductor field-effect transistors (MOSFETs) in semiconductor devices leads to deterioration in operation characteristics, necessitating improvements in electrical and reliability characteristics.

Innovation Solution

A semiconductor device design featuring channel patterns, source/drain patterns, gate electrodes, and active contacts with specific stress configurations and fabrication methods, including stress-exerting seed layers, to enhance performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of moving object

If MOSFETs are scaled down to meet increasing demand for smaller pattern sizes, then device size is reduced, but operation characteristics deteriorate

Engineering Contradiction:
Improvedevice sizeVSAvoidoperation characteristics
Core Design Contradiction:
Area of moving objectVSReliability

Solution Approach 1:

The patent applies parameter changes by introducing stress control through seed layers with different stress characteristics (tensile and compressive) to compensate for the degradation of operation characteristics caused by device scaling. This allows maintaining electrical performance while achieving smaller device dimensions.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses composite material structures by combining multiple seed layers with different stress properties (tensile-stress seed layer and compressive-stress seed layer) to create a balanced stress environment in the channel, thereby improving carrier mobility and electrical characteristics in scaled-down devices.

Inventive Principle:
Principle #40Composite materials

2Reliability

If active contacts are formed to improve electrical characteristics, then contact resistance is reduced, but device complexity increases

Engineering Contradiction:
Improveelectrical characteristicsVSAvoidcontact structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming stress-control seed layers before forming the active contacts. This preliminary stress engineering improves carrier mobility in the channel region, and the seed layers simultaneously serve as stress-control structures and as foundational layers for subsequent contact formation, reducing overall process complexity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The seed layers serve multiple functions: they control stress in the channel to improve carrier mobility, they serve as barrier layers preventing diffusion, and they provide a foundation for active contact formation. This multi-functionality reduces the need for separate dedicated structures, thereby managing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design improves electrical and reliability characteristics of semiconductor devices by optimizing stress distribution and contact structures, enhancing operational efficiency.

Implementation Method 1

The first and second seed layers may be configured to exert a stress on the first channel pattern and the second channel pattern, respectively

Methodology Applied
Scientific EffectStress effect: Piezoresistive Effect

Data Source

PatentUS20260020335A1Semiconductor device and method of fabricating the same
Publication Date: 2026.01.15 SAMSUNG ELECTRONICS CO LTD
  • US20260020335A1 patent drawing
  • US20260020335A1 patent drawing
  • US20260020335A1 patent drawing

AI summary

A semiconductor device may include a channel pattern on a substrate, a source/drain pattern electrically connected to the channel pattern, a gate electrode on the channel pattern, an interlayer insulating layer on the source/drain pattern, and an active contact that extends into the interlayer insulating layer and is electrically connected to the source/drain pattern. The active contact may include a lower active contact, which includes a barrier pattern and a lower metal pattern on the barrier pattern, and an upper active contact on the lower active contact. The upper active contact may include an upper metal pattern and an insulating pattern on side surfaces of the upper metal pattern. The lower metal pattern and the upper metal pattern may be in contact with each other.