Nanosheet Active-Cut SiGe Sacrificial Layer for Capacitance Control
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Solution Overview
Problem
The challenge in semiconductor devices is to reduce capacitance between contacts and ensure electrical stability as pitch sizes decrease, which can lead to short circuits due to gate electrodes between nanosheets.
Innovation Solution
Incorporating a sacrificial layer of silicon germanium (SiGe) on the side walls of active cuts between nanosheets to mitigate or prevent short circuits, while maintaining electrical stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If pitch size is decreased to achieve high integration, then device density is improved, but capacitance between contacts increases and electrical stability deteriorates
Solution Approach 1:
The gate electrode is segmented into multiple separate gate electrodes, each corresponding to a specific nanosheet. This segmentation isolates the electrical fields between gates, reducing parasitic capacitance between adjacent contacts while maintaining high integration density through the multi-nanosheet structure.
Solution Approach 2:
An insulating layer is introduced as an intermediary between the gate electrode and the nanosheet channel. This intermediate insulating layer reduces direct electrical coupling and capacitance between adjacent contacts, thereby improving electrical stability while allowing continued scaling for high integration.
2Power
If gate electrode is disposed between nanosheets to control channel, then transistor performance is improved, but short circuit risk increases due to capacitance coupling
Solution Approach 1:
The gate electrode is divided into multiple independent gate electrodes, each controlling a specific nanosheet channel. This segmentation reduces the overlapping electric field areas between adjacent gates, thereby maintaining effective channel control while minimizing capacitance coupling that could cause short circuits.
Solution Approach 2:
An insulating layer is positioned between the gate electrode and the nanosheet to act as a mediator. This insulating layer provides electrical isolation that prevents direct capacitance coupling between adjacent gate-nanosheet structures, reducing short circuit risk while still allowing the gate to control its corresponding channel through the insulator.
Data Source
AI summary
A semiconductor device including a substrate, a first and second active pattern extending in a first horizontal direction on the substrate, the second active pattern apart from the first active pattern in the first horizontal direction, first nanosheets apart from each other in a vertical direction on the first active pattern, second nanosheets apart from each other in the vertical direction on the first and second active patterns, a gate electrode extending in a second horizontal direction different from the first horizontal direction on the first active pattern and surrounding the first nanosheets, a source/drain region between the first and second nanosheets, an active cut penetrating the second nanosheets in the vertical direction, extending to the substrate, and separating the first and second active patterns, and a sacrificial layer between the source/drain region and the active cut, in contact with the active cut, and including silicon germanium may be provided.