Active Device Array Substrate Signal Line Testing Circuit

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Solution Overview

Problem

Existing active device array substrates face a high probability of open circuit defects in connecting conductors during testing processes of liquid crystal display panels, particularly in the first three columns of pixels, due to excess current applied during testing, which previous branch design modifications have not effectively addressed.

Innovation Solution

The active device array substrate design includes a substrate with a display region and peripheral region, featuring a pixel array and peripheral circuit with signal lines connected to shorting bars through connecting conductors, where at least two signal lines connected to the same shorting bar are electrically connected through a single connecting conductor, increasing the contact area and reducing the likelihood of open circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple connecting conductors are used to connect signal lines to shorting bars, then the electrical connection is enhanced, but the complexity of the testing circuit increases

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidtesting circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple signal lines (first, second, and third data lines) into a single connecting conductor, allowing them to be electrically connected to the same shorting bar through one shared conductor rather than multiple separate conductors. This reduces circuit complexity while maintaining reliable electrical connections during testing.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If testing signals with excess current are applied to test all pixels, then comprehensive testing is achieved, but the connecting conductors in the first three data lines are prone to breakage

Engineering Contradiction:
Improvetesting efficiencyVSAvoidconnecting conductor reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

By combining multiple data lines (first, second, and third data lines) into a single connecting conductor that connects to the same shorting bar, the patent distributes the excess testing current across a larger total contact area. This sharing of current load among multiple signal lines through a common conductor reduces the current density on any single conductor, thereby preventing breakage while maintaining comprehensive testing capability.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8022402B2Active device array substrate
Publication Date: 2011.09.20 AU OPTRONICS CORP
  • US8022402B2 patent drawing
  • US8022402B2 patent drawing
  • US8022402B2 patent drawing

AI summary

An active device array substrate including a substrate, a pixel array, and peripheral circuit is provided. The substrate has a display region and a peripheral region. The pixel array is disposed on the display region of the substrate, wherein the pixel array includes signal lines and pixels, each of the pixels is electrically connected to the signal lines respectively and extends from the display region to the peripheral region. The peripheral circuit is disposed on the peripheral region and includes a testing circuit electrically connected to the signal lines. Additionally, the testing circuit includes shorting bars and connecting conductors, wherein each of the signal lines is electrically connected to one of the shorting bars through one of the connecting connectors respectively, and at least two of the signal lines connected to the same shorting bar are electrically connected to each other through one of the connecting conductors.