Active Droop Current Sharing for POL Regulators

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Solution Overview

Problem

Current power distribution systems face challenges in efficiently managing high current demands, maintaining stability, and synchronizing power regulators due to limitations in current sharing algorithms and communication methods, which lead to inefficiencies and transient issues in complex electronic systems.

Innovation Solution

The implementation of an active droop current sharing algorithm using a digital communication bus allows for real-time feedback and adjustment of load lines between power regulators, enabling balanced current delivery and phase management across the system, thereby enhancing stability and responsiveness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If current sharing algorithms are used to manage high current demands, then power distribution efficiency is improved, but transient responses and stability issues worsen

Engineering Contradiction:
Improvepower distribution efficiencyVSAvoidsystem stability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by implementing a soft-start sequence where power regulators are gradually enabled in a controlled order. Before full power delivery, the system performs preliminary ramp-up of output voltages with controlled current limiting, preventing transient shocks and stability issues while establishing efficient current sharing from the outset.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms through real-time monitoring of output voltages and currents during the soft-start sequence. The control system continuously adjusts current limits and ramp rates based on feedback from voltage dividers and current sensors, ensuring stable operation while maintaining distribution efficiency under high current demands.

Inventive Principle:
Principle #23Feedback

2Ease of operation

If multiple power regulators are synchronized for current sharing, then load balancing is improved, but communication complexity and transient issues worsen

Engineering Contradiction:
Improveload balancingVSAvoidcommunication complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent uses an intermediary approach by introducing a master regulator that coordinates communication among all power regulators. The master regulator receives enable signals, determines the soft-start sequence, and distributes control commands to slave regulators through a communication bus, simplifying the communication architecture while achieving effective load balancing across multiple regulators.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies segmentation by dividing the power regulator system into a master regulator and multiple slave regulators with distinct roles. Each regulator is segmented into voltage control and current control functions, with the master handling coordination and slaves executing localized control, reducing overall communication complexity while maintaining load balance.

Inventive Principle:
Principle #1Segmentation

3Speed

If output voltages are ramped up quickly, then power delivery speed is improved, but recirculating currents and transient perturbations worsen

Engineering Contradiction:
Improvepower delivery speedVSAvoidrecirculating currents
Core Design Contradiction:
SpeedVSObject-generated harmful factors

Solution Approach 1:

The patent implements dynamics by making the current limit adaptive during the soft-start sequence. The current limit is dynamically adjusted based on the ramp rate and load conditions, increasing as voltage stabilizes and decreasing during transient phases. This dynamic control enables faster power delivery when safe while preventing recirculating currents during vulnerable transition periods.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies preliminary anti-action by implementing current limiting and controlled ramp rates before full power delivery begins. The system preemptively restricts current during the voltage ramp-up phase to prevent harmful recirculating currents from developing, then gradually relaxes these restrictions as the system reaches stable operating conditions.

Inventive Principle:
Principle #9Preliminary anti-action

4Adaptability or versatility

If phases are added or dropped dynamically, then system adaptability is improved, but output voltage stability and current sharing balance worsen

Engineering Contradiction:
Improvephase configuration flexibilityVSAvoidoutput voltage stability
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The patent applies preliminary action by requiring that phases be added or dropped through controlled soft-start sequences rather than instantaneous switching. Before a phase becomes active or inactive, the system performs preliminary voltage ramping or ramp-down with current limiting, preventing abrupt changes that would destabilize output voltage or disrupt current sharing balance among regulators.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS8487477B2Method to properly ramp current sharing
Publication Date: 2013.07.16 INTERSIL AMERICAS INC
  • US8487477B2 patent drawing
  • US8487477B2 patent drawing
  • US8487477B2 patent drawing

AI summary

A distributed power management system may include a communication bus and a plurality of POL (point-of-load) regulators coupled to the communication bus, and configured in a current sharing arrangement in which each POL regulator of the plurality of POL regulators has a respective output stage coupled to a common load and configured to generate a respective output current. Each POL regulator may have a respective phase in the current sharing configuration, and may transmit and receive information over the bus according to a bus communication protocol corresponding to the bus. The plurality of POL regulators may autonomously synchronize, to each other, a start time of their respective output voltage signal ramps by transmitting monitoring information to each other over the communication bus, while each of the POL regulators is ramping a duty cycle of a gate signal controlling a low-side field effect transistor of the output stage of the POL regulator according to a duty cycle of a gate signal controlling a high-side FET of the output stage of the POL regulator.