Active Element Array Substrate Merging Photomasks for LCD Fabrication

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Solution Overview

Problem

Current liquid crystal display (LCD) panels face challenges in achieving high contrast, fast response, and wide viewing angles while maintaining low power consumption and cost-effective fabrication, particularly in large-scale displays.

Innovation Solution

The active element array substrate is designed with a layered structure including a substrate, metal layers, insulation layers, semiconductor layers, and patterned conductive layers, which reduces the number of photomasks required in fabrication, thereby lowering production costs and enabling efficient display panel construction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional LCD panel fabrication processes are used, then display performance (contrast, response, viewing angle) can be improved, but the number of photomasks and fabrication complexity increases

Engineering Contradiction:
Improvedisplay performanceVSAvoidfabrication complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the formation of the first electrode pattern and second electrode pattern into a single photomask step. The first and second patterned conductive layers are formed simultaneously using one photomask, eliminating the need for separate photomasks that would traditionally be required for each electrode layer. This reduces fabrication complexity while maintaining the performance benefits of multiple electrode layers for improved contrast and viewing angle control.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If more photomasks are used to achieve high contrast and wide viewing angles, then display quality improves, but fabrication cost increases

Engineering Contradiction:
Improvedisplay qualityVSAvoidfabrication cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent combines multiple electrode pattern formation steps into a single photomask process. By forming both the first patterned conductive layer and second patterned conductive layer using one photomask, the fabrication cost is reduced while still achieving the high contrast and wide viewing angle performance that requires multiple electrode layers.

Inventive Principle:
Principle #5Merging (Combining)

3Manufacturing precision

If multiple patterned conductive layers are formed using separate photomasks, then electrode precision improves, but the number of fabrication steps increases

Engineering Contradiction:
Improveelectrode precisionVSAvoidfabrication efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent forms multiple patterned conductive layers in a single photomask step, maintaining electrode precision through careful design of the patterned conductive layers and their respective electrodes. The first patterned conductive layer and second patterned conductive layer are formed simultaneously, reducing the number of fabrication steps while preserving the precision needed for proper electrode alignment and function.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10203577B2Active element array substrate and display panel
Publication Date: 2019.02.12 INNOLUX CORP
  • US10203577B2 patent drawing
  • US10203577B2 patent drawing
  • US10203577B2 patent drawing

AI summary

An active element array substrate including a substrate, a first metal layer, a first insulation layer, a semiconductor layer, a first patterned conductive layer, a second metal layer, a second insulation layer, and a second patterned conductive layer is provided. The semiconductor layer is disposed on the first insulation layer. The first patterned conductive layer is disposed on the first insulation layer and covers a partial region of the semiconductor layer. The second metal layer is disposed on the first patterned conductive layer. The second insulation layer is disposed on the second metal layer and covers at least a partial region of the second metal layer, the first patterned conductive layer, the semiconductor layer, and the first insulation layer. The second patterned conductive layer is disposed on the second insulation layer and overlapped with the first patterned conductive layer. A display panel is also provided.