Active Fin Oxide Layer Formation for Transistor Isolation
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Solution Overview
Problem
As semiconductor devices are scaled down, their operational properties deteriorate, and existing methods struggle to maintain high performance and electrical characteristics.
Innovation Solution
A method of fabricating semiconductor devices involves patterning a substrate to form active fins, forming sacrificial gate patterns, removing these patterns to create gap regions, and forming oxide layers and impurity regions in the exposed active fins to improve electrical characteristics and separation between transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the size and design rule of semiconductor devices are reduced to scale them down, then device density and integration are improved, but operational properties and electrical characteristics deteriorate
Solution Approach 1:
The device is segmented into multiple fins extending from the substrate, creating a three-dimensional structure. This segmentation allows the device to maintain smaller footprint area while preserving operational properties through the combined effect of multiple fin channels, thereby resolving the contradiction between reduced device size and maintained electrical characteristics
Solution Approach 2:
The invention transitions from a planar two-dimensional device structure to a three-dimensional structure by extending fins vertically from the substrate. This dimensional change enables the device to achieve higher effective channel area and improved electrical characteristics within a reduced planar footprint, addressing the scaling challenge
2Reliability
If sacrificial gate patterns are removed to create gap regions for better transistor separation, then electrical characteristics are improved, but device complexity and process steps increase
Solution Approach 1:
Sacrificial gate patterns are formed in advance before the actual gate structures are created. These preliminary sacrificial gates define the gap regions where separation regions will subsequently be formed, enabling precise transistor isolation and improved electrical characteristics through planned preliminary structuring
Solution Approach 2:
Sacrificial gate patterns serve as intermediary structures that facilitate the creation of gap regions and separation regions. These temporary mediators enable precise positioning and formation of isolation features, after which they are removed, having served their purpose in defining the final device architecture
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the electrical characteristics of semiconductor devices by forming isolation regions and improving transistor separation, thereby addressing the challenges of scaling down semiconductor devices.
Implementation Method 1
forming an oxide layer in the exposed active fin
Implementation Method 2
forming an impurity region with impurities implanted into the exposed active fin
Data Source
AI summary
A method of fabricating a semiconductor device includes patterning a substrate to form an active fin, forming a sacrificial gate pattern crossing over the active fin on the substrate, removing the sacrificial gate pattern to form a gap region exposing the active fin, and forming a separation region in the active fin exposed by the gap region. Forming the separation region includes forming an oxide layer in the exposed active fin and forming an impurity regions with impurities implanted into the exposed active fin.