Active Gate Driver Buffer Control at the Miller Plateau
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Solution Overview
Problem
Conventional active gate controllers for power transistors have complex control structures and high power consumption due to their inability to fully switch on or off quickly, leading to excessive current flow and potential damage during switching.
Innovation Solution
An active gate driver with a two-level Miller plateau detector, cycle shifter, flexible split-path feedback circuit, PMOS and NMOS switch pickers, and buffer arrays to detect the Miller plateau and selectively turn off transistors, reducing power consumption and preventing asymmetric aging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional active gate controllers are used to control power transistors, then switching speed is improved, but power consumption increases and control complexity increases
Solution Approach 1:
The gate driver is segmented into multiple PMOS and NMOS transistor buffers arranged in arrays. Each buffer can be independently controlled through switch pickers, allowing the system to activate only the necessary number of buffers based on the detected Miller plateau duration, thereby reducing overall power consumption while maintaining fast switching capability.
Solution Approach 2:
The system dynamically adjusts the number of active buffers based on real-time detection of the Miller plateau. The Miller plateau detector continuously monitors the gate voltage, and the cycle shifter dynamically reconfigures which buffers are active in each switching cycle, optimizing the balance between switching speed and power consumption.
2Speed
If conventional active gate controllers are used to control power transistors, then switching speed is improved, but control structure complexity increases
Solution Approach 1:
The control structure is segmented into modular functional blocks: Miller plateau detector, cycle shifter, switch pickers, and buffer arrays. Each block performs a specific function and can be independently designed and optimized, reducing overall control complexity while maintaining fast switching performance.
Solution Approach 2:
The Miller plateau detector provides real-time feedback on the gate voltage state to the cycle shifter, which automatically adjusts the buffer configuration. This closed-loop feedback mechanism simplifies control by eliminating the need for complex external control circuits, as the system self-regulates based on detected conditions.
3Use of energy by moving object
If the same PMOS transistors are repeatedly turned off in each cycle, then power consumption is reduced during Miller plateau, but asymmetric aging occurs in the PMOS transistor array
Solution Approach 1:
The cycle shifter implements periodic reconfiguration of the buffer arrays by shifting the active buffer positions in each switching cycle. This periodic action ensures that different PMOS transistors are activated in different cycles, distributing the stress and preventing asymmetric aging while maintaining power efficiency during Miller plateau detection.
Solution Approach 2:
The system intentionally introduces temporal asymmetry in the activation pattern of PMOS transistors through the cycle shifter. By rotating which transistors are active in each cycle rather than always using the same ones, the system balances the cumulative stress across all transistors, preventing asymmetric aging and improving long-term reliability.
Data Source
AI summary
An active gate driver provided to drive a power transistor includes a two-level Miller plateau detector, a cycle shifter, a flexible split-path feedback circuit, a PMOS switch picker, a NMOS switch picker, a PMOS buffer array and a NMOS buffer array. The active gate driver turns off some PMOS transistors of the PMOS buffer array and some NMOS transistors of the NMOS buffer array to lower power consumption when the power transistor in the Miller plateau. And the active gate driver also turns off some PMOS transistors of the PMOS buffer array if a gate-source voltage is greater than a high-potential reference voltage, thereby further reducing power consumption.