Active Gate Voltage Clamping Without Quiescent DC Current
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Solution Overview
Problem
Conventional gate driving circuits face issues with high power consumption and large chip area occupation due to direct current flow and the need for large capacitors in voltage clamping, which can lead to breakdown of gate oxide layers in field effect transistors.
Innovation Solution
An active voltage-clamping gate driving circuit that utilizes a difference comparison circuit to detect and control the gate driving signal, turning off the gate driving circuit when a preset output level is reached, thereby clamping the voltage level without quiescent direct current and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a Zener diode is used to clamp the output voltage, then the voltage clamping effect is achieved, but the power consumption increases due to direct current flowing through the Zener diode
Solution Approach 1:
The patent employs a dynamic control mechanism where the gate driving circuit is switched on and off based on real-time voltage detection. When the voltage difference between output and supply reaches a preset threshold, the control circuit turns off the gate driving circuit, dynamically adjusting the system state to maintain voltage clamping without continuous current flow, thereby reducing power consumption compared to static Zener diode clamping
Solution Approach 2:
The patent implements a feedback control system where the detection circuit continuously monitors the voltage difference between the output signal and supply voltage, and feeds this information back to the control circuit. This feedback mechanism enables precise voltage clamping by triggering the gate driving circuit to turn off when the preset voltage threshold is reached, achieving reliable voltage protection while minimizing unnecessary current consumption
2Reliability
If a linear regulator is used to clamp the output voltage, then the voltage clamping effect is achieved, but a large-area voltage-stabilizing capacitor is required, occupying large chip area
Solution Approach 1:
The patent extracts and eliminates the need for large-area voltage-stabilizing capacitors by using an active control mechanism. Instead of relying on passive energy storage components, the invention uses a detection circuit to monitor voltage levels and a control circuit to switch the gate driving circuit on and off, thereby achieving voltage clamping without requiring large capacitive elements, significantly reducing chip area
Solution Approach 2:
The patent replaces the passive mechanical/electrical system of linear regulators with capacitors with an active electronic control system. The detection circuit and control circuit work together to electronically regulate the gate driving circuit's operation, substituting the need for large physical capacitors with a compact electronic feedback mechanism, thus reducing chip area while maintaining voltage clamping reliability
3Reliability
If conventional voltage clamping methods are used, then the gate oxide layers are protected, but the quiescent direct current and transient current requirements increase
Solution Approach 1:
The patent employs periodic action by switching the gate driving circuit on and off in response to voltage conditions. Instead of maintaining continuous quiescent current flow, the control circuit periodically activates the gate driving circuit only when needed to maintain proper voltage levels, thereby protecting gate oxide layers while minimizing energy loss through reduced current consumption during normal operation
Data Source
AI summary
An active voltage-clamping gate driving circuit comprises a difference comparison circuit for receiving a reference voltage, a gate driving signal, and a preset voltage level, and outputting a voltage comparison signal; and a gate driving circuit for receiving an input signal and the voltage comparison signal, and outputting a gate driving signal. The voltage comparison signal controls the gate driving circuit. When a level difference between the gate control signal and the reference voltage is equal to the preset voltage level, the gate driving circuit is turned off, so that the level of the gate control signal is clamped to the preset voltage level, and the gate driving circuit does not output quiescent direct current under the clamped state.