Active Inductor Circuit Topology for Wider Amplifier Bandwidth

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional amplifying circuits face challenges in increasing bandwidth due to area constraints in IC design, where optimizing inductor performance within a reasonable area is difficult, and existing active inductors do not effectively enhance circuit bandwidth.

Innovation Solution

An active inductor with a novel structure comprising a P-type transistor, an N-type transistor, capacitors, resistors, and bias current sources is used as an inductive load in amplifying circuits, providing lower impedance at lower frequencies and higher impedance at higher frequencies, effectively increasing circuit bandwidth.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a conventional inductor is used to increase bandwidth, then the circuit bandwidth increases, but the area occupied by the inductor becomes too large for reasonable IC design

Engineering Contradiction:
Improvecircuit bandwidthVSAvoidinductor area
Core Design Contradiction:
SpeedVSArea of stationary object

Solution Approach 1:

The patent replaces the physical inductor component with an active inductor circuit implemented using transistors (M1, M2), capacitors (C1, C2), and resistors. This substitution eliminates the need for large-area physical inductors while maintaining the inductive effect through active circuit elements, thereby increasing bandwidth without proportionally increasing chip area.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the operating parameters of the active inductor circuit, specifically setting the bias current to operate in subthreshold region and optimizing the values of C1, C2, and other components. This allows the active inductor to achieve optimal impedance characteristics (lower impedance at lower frequencies, higher impedance at higher frequencies) that effectively increase bandwidth while maintaining compact area.

Inventive Principle:
Principle #35Parameter changes

2Speed

If the inductance value is increased to further increase bandwidth, then the bandwidth increases, but the gain peaking becomes excessive and destabilizes the circuit

Engineering Contradiction:
Improvecircuit bandwidthVSAvoidfrequency response stability
Core Design Contradiction:
SpeedVSStability of the object's composition

Solution Approach 1:

The patent introduces a feedback mechanism through the active inductor circuit configuration where the impedance characteristics are controlled to provide lower impedance at lower frequencies and higher impedance at higher frequencies. This feedback-like behavior prevents excessive gain peaking and stabilizes the frequency response while still achieving bandwidth extension.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent optimizes specific parameter values including setting C1 and C2 to specific ranges, configuring the bias current for subthreshold operation, and selecting appropriate resistor values. These parameter changes ensure the active inductor provides the right impedance profile to increase bandwidth while maintaining frequency response stability without excessive gain peaking.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9312819B1Active inductor and associated amplifying circuit
Publication Date: 2016.04.12 GLOBAL UNICHIP CORPORATION
  • US9312819B1 patent drawing
  • US9312819B1 patent drawing
  • US9312819B1 patent drawing

AI summary

An active inductor includes a first transistor, a capacitor, a second transistor, a first resistor, a second resistor, and a bias current source. A source terminal of the first transistor is a first terminal of the active inductor and connected to a first voltage source. The capacitor is connected to the source terminal and gate terminal of the first transistor. A drain terminal of the second transistor is connected to the source terminal of the first transistor. A gate terminal of the second transistor is connected to a drain terminal of the first transistor. The first resistor is connected between the drain terminal of the first transistor and a second terminal of the active inductor. The second resistor is connected to a source terminal of the second transistor. The bias current source is connected between the second resistor and a second voltage source.