Active Interposer Patches for Lower-Cost Chiplet Bridging
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Solution Overview
Problem
Producing large interposers with active components is prohibitively expensive, and active components are often needed only in certain regions, leading to challenges in designing and packaging semiconductor chips with high bandwidth and low latency.
Innovation Solution
Embedding active chips within trenches in a larger interposer structure, creating patches of active circuitry within a passive interposer, while maintaining a planar top surface for subsequent chip joins, and providing backside contacts for active portions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If large interposers with active components are produced, then functionality and performance are improved, but manufacturing cost increases prohibitively
Solution Approach 1:
The patent applies local quality by creating distinct active and passive regions within the interposer. Active components are strategically placed only in specific regions where high bandwidth and low latency are required, while other regions remain passive. This localized approach provides the necessary functionality without the prohibitive cost of making the entire interposer active.
Solution Approach 2:
The interposer is segmented into multiple regions with different functional characteristics - active regions containing active components and passive regions without active components. This segmentation allows the design to optimize for performance where needed while controlling manufacturing costs by limiting active components to specific areas rather than distributing them throughout the entire interposer.
2Reliability
If active components are distributed throughout the interposer, then performance is improved, but design and packaging complexity increases
Solution Approach 1:
By concentrating active components in specific localized regions rather than distributing them throughout the entire interposer, the patent reduces design and packaging complexity. The active regions can be designed and packaged separately from passive regions, simplifying the overall manufacturing process while still achieving high performance where needed.
Data Source
AI summary
A semiconductor device comprises a wafer with an active interposer comprising one or more active components in an active component layer. The semiconductor device comprises a first chiplet that is mounted on the wafer and above the active interposer, a second chiplet that is mounted on the wafer and above the active interposer, and an interconnect layer having an interconnection that bridges between the first chiplet and the second chiplet. The interconnect layer is configured to transfer at least one of power and a signal from a bottom-side bump on a bottom side of the wafer to at least one of the first chiplet and the second chiplet, directly or indirectly, through a TSV of the active interposer.