On-Chip Active LDO Regulator Switching for Faster Wake-Up
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Solution Overview
Problem
On-chip Low Drop Out (LDO) regulators in DRAM and NAND memory devices experience long wake-up times during mode transitions from standby to active due to high RC time constants and voltage drops at the output node, leading to errors during data transfer.
Innovation Solution
The LDO regulator design includes a pass element, feedback circuit, error amplifier, compensation capacitor, and detection circuit, where a first switch is controlled to connect or disconnect a node from the pass element based on operating mode, improving wake-up response and reducing voltage drops through charge sharing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a large compensation capacitance is used in the feedback loop to improve voltage stability, then the voltage stability is improved, but the wake-up time becomes longer due to high RC time constant
Solution Approach 1:
The patent applies preliminary action by pre-charging the compensation capacitance through a dedicated charge pump circuit before the LDO regulator needs to respond to load changes. This pre-charging action prepares the capacitance in advance, allowing faster discharge during wake-up transitions without compromising voltage stability during normal operation.
Solution Approach 2:
The patent implements dynamics by making the compensation capacitance value variable rather than fixed. A switch circuit dynamically connects or disconnects the compensation capacitance based on the operating mode (standby vs. active), allowing the system to optimize between voltage stability and wake-up speed depending on the current state.
2Speed
If the LDO regulator is designed for fast wake-up response, then the wake-up time is reduced, but voltage droop increases at the output node during mode transitions
Solution Approach 1:
The charge pump circuit performs preliminary charging of the compensation capacitance before wake-up transitions, ensuring that sufficient charge is available to maintain output voltage stability during the fast transition period.
Solution Approach 2:
The patent introduces a charge pump circuit as an intermediary component that mediates between the power supply and the LDO regulator. This intermediary provides additional charge during wake-up transitions, enabling fast response without causing excessive voltage droop at the output node.
3Use of energy by moving object
If the compensation capacitance is disconnected during standby mode to reduce power consumption, then the power consumption is reduced, but the voltage stability during active mode may be affected
Solution Approach 1:
The patent applies dynamics by dynamically controlling the connection state of the compensation capacitance. During standby mode, the capacitance is disconnected to minimize power consumption. During active mode, the capacitance is connected to ensure proper voltage stability and loop compensation.
Solution Approach 2:
Before transitioning to active mode, the charge pump circuit pre-charges the compensation capacitance, ensuring that when the capacitance is connected, it is already prepared to provide stable voltage regulation without causing transient disturbances.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances the wake-up response and reduces voltage undershoot, improving the LDO regulator's performance by optimizing the discharge time and voltage stability during mode transitions.
Implementation Method 1
The compensation capacitor includes a first terminal and a second terminal, where the first terminal is coupled to a first node and the second terminal is coupled to the output node of the LDO regulator
Implementation Method 2
When the LDO regulator is operating in an active mode, the first switch is turned on to connect the first node and a control terminal of the pass element and when the LDO regulator is operating in a standby mode, the first switch is turned off to disconnect the first node from the control terminal of the pass element
Data Source
AI summary
A method of regulating a low-dropout (LDO) regulator is provided. The method includes: generating a feedback voltage by receiving a feedback from an output node of the LDO regulator, generating a control signal to drive a pass element by receiving the feedback voltage and a reference voltage, detecting a voltage at a first node and controlling a switching operation of a first switch according to a detection result by a detection circuit. When the LDO regulator is operating in an active mode, the first switch is turned on to connect the first node and a control terminal of the pass element and when the LDO regulator is operating in a standby mode, the first switch is turned off to disconnect the first node from the control terminal of the pass element. A low-dropout (LDO) regulator is also provided.