Active Load Modulation Synchronization for Fast PLL Locking
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Solution Overview
Problem
Active load modulation in contactless communication systems experiences phase shifts and instability due to non-synchronous responses during long emission periods, particularly when using digital modulation protocols like BPSK or Manchester coding, which limits the bandwidth of phase-locked loops and affects communication stability.
Innovation Solution
A method for synchronizing carrier signals using a digital phase-locked loop that adjusts its frequency and phase by controlling the oscillator with a first control signal until locking is detected, then switching to a second control signal generated through a modulo operation on the phase error, reducing phase drifts and enabling quick convergence of the phase-locked loop.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If active load modulation is used for contactless communication, then communication distance and data transmission capability are improved, but phase shifts and synchronization instability occur during long emission periods
Solution Approach 1:
The patent implements a feedback mechanism where the object detects the reader's carrier signal phase and adjusts its own carrier signal phase accordingly. The object's phase-locked loop continuously monitors the reader's carrier phase and feeds back correction signals to maintain synchronization, preventing phase drift during long emission periods while preserving active load modulation benefits.
Solution Approach 2:
The patent dynamically changes the phase parameter of the object's carrier signal based on detected reader carrier phase. By adjusting the phase parameter in real-time according to the reader's carrier phase variations, the system maintains synchronization stability without sacrificing the high data transmission capability enabled by active load modulation.
2Stability of the object's composition
If the phase-locked loop bandwidth is reduced to filter noise, then phase stability is improved, but the response time and ability to track frequency changes deteriorate
Solution Approach 1:
The patent makes the phase-locked loop bandwidth dynamic rather than fixed. The bandwidth automatically adjusts based on operating conditions - narrowing when stability is needed and widening when rapid tracking is required. This dynamic adaptation allows the system to achieve both phase stability and fast response time in different operational contexts.
Solution Approach 2:
The patent implements periodic phase correction cycles where the object periodically measures the reader's carrier phase and applies corrections. This periodic action allows the phase-locked loop to maintain stability over long periods while still responding quickly to phase variations, effectively decoupling the time constants of noise filtering and phase tracking.
3Productivity
If digital modulation protocols like BPSK or Manchester coding are used, then data transmission efficiency is improved, but phase shifts accumulate during long transmission periods
Solution Approach 1:
The patent uses feedback to continuously monitor and correct phase shifts caused by digital modulation protocols. The object detects the reader's carrier phase after each modulation cycle and adjusts its phase accordingly, preventing cumulative phase errors during long transmission periods while maintaining high data transmission efficiency through protocols like BPSK or Manchester coding.
Solution Approach 2:
The patent performs preliminary phase alignment before data transmission begins and periodically during transmission. By pre-synchronizing the phase-locked loop and applying periodic re-synchronization, the system prevents phase shift accumulation before it affects data integrity, enabling efficient digital modulation without sacrificing long-term synchronization reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes phase shifts and stabilizes the phase-locked loop, ensuring synchronous communication and maintaining high bandwidth, even during periods of low signal frequency, thereby enhancing the reliability and efficiency of active load modulation in contactless communication systems.
Implementation Method 1
During information transmission between a reader and an emulated object in tag or card mode, the reader generates a magnetic field via its antenna, which is generally, according to commonly used standards, a 13.56 MHz sinusoidal wave.
Implementation Method 2
This modulation is achieved by changing the load connected to the terminals of the object's antenna. By changing the load across the object's antenna, the output impedance of the reader's antenna changes due to magnetic coupling between the two antennas.
Implementation Method 3
a second carrier signal taken from the output signal of a controlled oscillator of a digital phase-locked loop of said object; said synchronization includes: as long as a lock of said loop has not been detected, a servo control of the frequency of the output signal of the oscillator on a frequency multiple of the reference frequency, by controlling the oscillator with a first control signal generated from a first value representative of the phase error of said phase-locked loop
Data Source
Figure 1~2
Figure 3~4A
Figure 4B~4C
AI summary
Object (TG) capable of contactless communication with a reader (RD) by active load modulation, configured to receive a first carrier signal (clex) emitted by the reader (RD) and deliver a second carrier signal (OUT), the object comprising synchronization means (MSYNC) configured to synchronize a first carrier signal (clex) and the second carrier signal (OUT), said synchronization means (MSYNC) comprising detection means (MD) configured to detect the locking of said loop (DPLL), and control means (MC) configured to control the output signal frequency of an oscillator (DCO) by controlling the oscillator (DCO) with a first control signal (VAL1) generated from a first value (ERR1) representative of the phase error of said phase-locked loop (DPLL),then with a second control signal (VAL2) generated from a second value (ERR2) delivered by a first module (MD1) configured to perform a modulo operation on said first value (ERR1) representing the phase error of the loop.