Active Matrix Substrate Source Contact Layout for Low Resistance
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Solution Overview
Problem
Existing active matrix substrates with oxide semiconductor TFTs face challenges in reducing contact resistance at the source contact portion, particularly when using low resistance metals like Cu, and the process complexity increases with multilayer films to achieve ohmic contact.
Innovation Solution
The active matrix substrate design includes a source contact structure with a source contact hole in both the lower and interlayer insulating layers, utilizing a connection electrode formed from the same conductive film as the source bus line, which reduces contact resistance by aligning the oxide semiconductor layer's first region directly with the source bus line.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a low resistance metal film such as Cu is used for the source bus line, then the wiring resistance is reduced, but the contact resistance at the source contact portion increases
Solution Approach 1:
The source bus line is constructed as a multilayer film structure combining Cu (or Al) with Ti. The Cu layer provides low resistance for current conduction, while the Ti layer forms an ohmic contact with the oxide semiconductor layer, thereby simultaneously achieving low wiring resistance and low contact resistance
Solution Approach 2:
The Ti film acts as an intermediary layer between the low resistance metal (Cu/Al) and the oxide semiconductor layer. This intermediate Ti layer enables ohmic contact formation while the underlying Cu/Al layer maintains low wiring resistance, resolving the contradiction between the two requirements
2Reliability
If a multilayer film is used to achieve ohmic contact, then the contact resistance is reduced, but the number of manufacturing steps increases
Solution Approach 1:
The source bus line formation and source electrode formation are merged into a single process step. The multilayer film (Cu/Ti or Al/Ti) is patterned together to create both the source bus line and source electrode, reducing manufacturing steps while maintaining low contact resistance through the Ti layer
3Object-generated harmful factors
If the source bus line is formed closer to the substrate side than the gate bus line, then the parasitic capacitance is reduced, but the contact resistance at the source contact portion increases
Solution Approach 1:
The source bus line uses a Cu/Ti multilayer structure where Ti provides ohmic contact capability. This allows the lower source structure (reducing parasitic capacitance) to maintain low contact resistance, overcoming the limitation of simple low resistance metal films in this configuration
Data Source
AI summary
An active matrix substrate includes a plurality of gate bus lines, a plurality of source bus lines located closer to the substrate side; a lower insulating layer that covers the source bus lines; an interlayer insulating layer that covers the gate bus lines; a plurality of oxide semiconductor TFTs disposed in association with respective pixel regions; a pixel electrode disposed in each of the pixel regions; and a plurality of source contact portions each of which electrically connects one of the oxide semiconductor TFTs to the corresponding one of the source bus lines, in which each of the oxide semiconductor TFTs includes an oxide semiconductor layer disposed on the lower insulating layer, a gate electrode disposed on a portion of the oxide semiconductor layer, and a source electrode formed of a conductive film, and each of the source contact portions includes a source contact hole, and a connection electrode.