Active Matrix Substrate Asymmetric Pixel Layout for Driving Circuit Integration
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Solution Overview
Problem
Conventional active matrix substrates cannot accommodate large switching elements in the display region due to narrow areas between data and pixel control elements, limiting the arrangement of driving circuits and increasing parasitic capacitance and power consumption.
Innovation Solution
The active matrix substrate design includes vertical and horizontal lines with irregular intervals, allowing pixel control elements to be arranged on different sides of the lines, creating wider spaces for switching elements, which reduces the length of internal nodes and parasitic capacitance, enabling larger switching elements and improved yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If all pixel control elements are arranged on the same side with respect to data lines, then the layout is simple and regular, but the area between adjacent pixel control elements becomes narrow, preventing large switching elements from being arranged
Solution Approach 1:
The patent applies asymmetry by arranging pixel control elements on different sides of data lines in an irregular pattern, rather than uniformly on one side. This creates variable spacing between elements, generating wider areas in certain regions that can accommodate large switching elements for the driving circuit, while maintaining overall layout feasibility
Solution Approach 2:
The patent implements local quality by creating specific wider areas between certain pixel control elements to accommodate switching elements, while other areas maintain regular spacing. This localized variation in spacing allows the driving circuit to be placed within the display region without compromising the overall pixel array structure
2Adaptability or versatility
If switching elements are arranged in narrow areas between data lines and pixel control elements, then the driving circuit can be integrated, but the switching elements must be small, increasing parasitic capacitance and power consumption
Solution Approach 1:
By creating asymmetric spacing patterns with wider gaps between certain pixel control elements, the patent provides sufficient area for large switching elements that can handle higher current with lower resistance, thereby reducing power consumption while maintaining driving circuit integration within the display region
Solution Approach 2:
The patent utilizes the two-dimensional space within the display region more effectively by creating irregular spacing patterns that generate usable areas for switching elements, transforming previously wasted narrow spaces into functional areas for the driving circuit
3Area of stationary object
If pixel control elements are arranged with irregular intervals, then wider spaces are created for switching elements, but the layout complexity increases
Solution Approach 1:
The patent applies local quality by implementing irregular intervals only in specific regions where switching elements need to be accommodated, while maintaining regular spacing in other areas. This localized irregularity creates the necessary space for driving circuits without making the entire layout overly complex
Data Source
AI summary
Provided is an active matrix substrate 20a in which either a plurality of source lines (data lines) 15S or a plurality of gate lines 13G, as constituent elements of the active matrix substrate 20a, are vertical lines extending in the longitudinal direction, and the other are horizontal lines. Among a plurality of pixel control elements 16T that are provided in correspondence to a plurality of pixels and are connected with the data line 15S and the gate lines 13G so as to control display of the corresponding pixels, respectively, a part of the pixel control elements 16T connected with one same horizontal line are arranged on one side with respect to the respective vertical lines to which the pixel control elements are connected, the side being different from a side on which the other pixel control elements connected with the same horizontal line are arranged. Among a plurality of switching elements 18 as constituent elements of a gate driver (driving circuit) 11, at least a part of the switching elements 18 are respectively arranged in areas between adjacent ones of the vertical lines, in each of which areas a distance between adjacent ones of the pixel control elements 16T is wider than a distance between other adjacent ones of the pixel control elements 16T.