Active Matrix Substrate Light Blocking Layer for Oxide TFT Stability
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Solution Overview
Problem
Active matrix substrates using oxide semiconductor TFTs face a positive shift in threshold voltage, leading to degraded reliability and characteristics, particularly in SSD circuit and gate driver circuit TFTs, due to the drive of the active matrix substrate, which affects the operational margin and functionality of these components.
Innovation Solution
Incorporating a light blocking layer with specific configurations, such as the first light blocking structure, which allows a predetermined amount of light to enter the oxide semiconductor layer, offsetting the positive shift by inducing photodegradation and maintaining high mobility, while adjusting the light blocking ratio and structure to compensate for alignment shifts and ensure reliable TFT characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a light blocking layer is added to suppress positive threshold voltage shift, then reliability is improved, but device complexity increases
Solution Approach 1:
The gate electrode is designed to serve dual functions: as the control electrode for the TFT and as a light blocking layer to suppress positive threshold voltage shift. This multi-functional design prevents carrier accumulation in the oxide semiconductor layer caused by light irradiation during high-duty-cycle operation, thereby maintaining threshold voltage stability without adding separate light blocking structures.
Solution Approach 2:
The patent combines the gate electrode and light blocking layer into a single integrated structure. The gate electrode itself is configured to block light from reaching the oxide semiconductor layer, merging the electrical control function and optical shielding function into one component, thus improving reliability without increasing device complexity.
2Reliability
If the gate electrode is extended to cover the entire oxide semiconductor layer, then light blocking effectiveness is improved, but manufacturing precision requirements increase due to alignment shifts
Solution Approach 1:
The gate electrode is designed with preliminary extension beyond the oxide semiconductor layer boundaries in the width direction. This over-extension ensures that even when alignment shifts occur during manufacturing, the gate electrode maintains sufficient coverage to block light effectively, compensating for potential misalignment without requiring extremely precise alignment.
Solution Approach 2:
The patent adjusts the width parameter of the gate electrode to be larger than the oxide semiconductor layer width, creating a margin of error. By changing the dimensional parameter of the gate electrode, the design accommodates alignment variations during manufacturing while maintaining effective light blocking coverage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses the positive shift of the threshold voltage, enhancing the reliability and stability of the active matrix substrate by utilizing photodegradation to maintain desired TFT characteristics and operational margins, even under high-duty-cycle control signals.
Implementation Method 1
a light blocking layer with specific configurations, such as the first light blocking structure, which allows a predetermined amount of light to enter the oxide semiconductor layer
Implementation Method 2
offsetting the positive shift by inducing photodegradation and maintaining high mobility
Data Source
AI summary
An active matrix substrate is provided with a plurality of oxide semiconductor TFTs including a plurality of first TFTs. An oxide semiconductor layer of each oxide semiconductor TFT includes a channel region, a source contact region, and a drain contact region. In a view from a normal direction of the substrate, the channel region is a region located between the source contact region and the drain contact region and overlapping a gate electrode, and the channel region includes a first end portion and a second end portion that oppose each other and extend in a first direction from the source contact region side toward the drain contact region side, a source side end portion that is located on the source contact region side of the first and second end portions and extends in a second direction that intersects the first direction, and a drain side end portion that is located on the drain contact region side of the first and second end portions and extends in the second direction. Each first TFT further includes a light blocking layer located between the oxide semiconductor layer and the substrate. In a view from the normal direction of the substrate, the light blocking layer includes an opening region that overlaps part of the channel region and a light blocking region that overlaps another part of the channel region. In a view from the normal direction of the substrate, the light blocking region includes a first light blocking portion that extends in the first direction over the first end portion of the channel region and a second light blocking portion that extends in the first direction over the second end portion of the channel region; each of the first light blocking portion and the second light blocking portion includes a first edge portion and a second edge portion that oppose each other and extend in the first direction; at least part of the first edge portion overlaps the channel region; and the second edge portion is located on an outer side of the channel region and does not overlap the channel region.