Active Region Trimming After Source/Drain Growth in FinFETs
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Solution Overview
Problem
As semiconductor device sizes continue to scale down, the formation of active regions in FinFET and GAA devices faces challenges such as sub-optimal source/drain component growth and increased risk of electrical shorting due to non-linear top view profiles of trimmed active regions, which can lead to performance degradation and reduced yield.
Innovation Solution
The active region trimming process is performed after source/drain components have been grown, with a dielectric isolation structure covering the active regions, allowing only a portion to be trimmed, maintaining a linear profile and reducing the risk of electrical shorting by ensuring gate spacers achieve their intended thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If active region trimming is performed before source/drain component formation, then the active region size is reduced to improve device performance, but the source/drain components cannot achieve optimal growth size
Solution Approach 1:
The patent performs source/drain component formation before active region trimming. By growing the source/drain components on the full-sized active region first, the components achieve optimal growth size and quality. The trimming operation is then performed afterward to reduce the active region size for improved device performance, without compromising the already-formed source/drain components.
2Shape
If active region trimming is performed, then the active region profile is improved, but the risk of electrical shorting increases due to non-linear top view profile
Solution Approach 1:
The patent performs active region trimming after source/drain component formation and gate spacer deposition. By delaying the trimming operation until after the gate spacers are in place, the linear profile of the active region is maintained during critical fabrication steps, reducing the risk of electrical shorting. The trimming is then performed to achieve the desired profile improvement without compromising reliability.
Solution Approach 2:
The patent deposits gate spacers before performing active region trimming. These gate spacers act as a protective cushion that maintains the linear profile and prevents electrical shorting during the trimming process. The spacers are formed in advance to compensate for the potential profile distortion that will occur during trimming.
3Productivity
If active region trimming is performed early in the process, then manufacturing efficiency is improved, but device yield decreases due to increased electrical shorting risks
Solution Approach 1:
The patent schedules active region trimming for a later stage in the fabrication process, after source/drain component formation and gate spacer deposition. This sequencing ensures that the linear profile is maintained during critical steps, reducing electrical shorting risks and improving device yield. The trimming operation is performed at the optimal point in the process flow to balance manufacturing efficiency with device reliability.
Data Source
AI summary
A dummy gate structure is formed over a plurality of active regions. The dummy gate structure extends in a first horizontal direction in a planar top view. The active regions each extend in a second horizontal direction in the planar top view. The second horizontal direction is different from the first horizontal direction. A plurality of source/drain components is formed over the active regions. A dielectric structure is formed over the source/drain components. The dummy gate structure is then removed. A removal of the dummy gate structure exposes a first segment of each of the active regions. A thickness of the first segment of each of the active regions is reduced in the first horizontal direction.