Active Snubber Circuit With Delayed Gate Discharge
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Solution Overview
Problem
Existing DC-DC converters with active snubber circuits suffer from power loss due to wasteful consumption of electric charges and through-current issues, leading to inefficiencies and increased size and cost due to the use of resistors for charge extraction.
Innovation Solution
A switch circuit with an active snubber circuit that includes a second FET switch element, a capacitor, a third switch element connected to the gate to extract electric charges, and a delay circuit that controls the timing of the third switch element's activation, preventing through-current and optimizing the conduction period without relying on resistors for charge extraction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a resistor is used to extract electric charges from the snubber switch element gate, then the gate voltage is discharged, but power loss increases and component size/cost increases
Solution Approach 1:
The patent replaces the resistor-based charge extraction mechanism with a capacitor-based mechanism. The third switch element connects the gate to ground through a capacitor, eliminating the need for a resistor and the associated power loss while maintaining reliable gate voltage discharge functionality.
Solution Approach 2:
The patent uses a capacitor instead of a resistor, where the capacitor can be fully discharged and reused in each switching cycle without continuous power consumption. This approach reduces energy loss while maintaining the necessary charge extraction function.
2Device complexity
If the ON-period of the snubber switch element is determined by the time constant of parasitic capacitance and resistor, then the circuit is simple, but through-current occurs when large voltage is applied
Solution Approach 1:
The patent changes the determining factor for the ON-period from an RC time constant to a delay circuit-controlled timing mechanism. This allows precise control of the switch element's ON duration, preventing through-current while maintaining circuit functionality.
Solution Approach 2:
The patent introduces a delay circuit as an intermediary between the voltage application and the switch element's ON state. This delay circuit precisely controls when the third switch element turns on, ensuring the gate is fully discharged before the main switch turns on, thereby preventing through-current.
3Reliability
If the snubber switch element turns off before the commutation switch element turns on, then the voltage is clamped, but power conversion efficiency deteriorates due to charge loss
Solution Approach 1:
The patent recovers the electric charges that would otherwise be lost by using a capacitor to store and reuse them. The capacitor-based charge extraction mechanism allows the charges to be discharged controllably without being wasted, improving power conversion efficiency while maintaining voltage clamping reliability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces power loss, prevents through-current, and allows for a more efficient and cost-effective DC-DC converter design by determining the ON time of the second switch element through the delay circuit, eliminating the need for costly resistors and minimizing area usage.
Implementation Method 1
a capacitor connected in series to the second switch element
Implementation Method 2
a delay circuit which turns on the third switch element at a timing that is delayed from a timing at which the second switch element is turned on
Data Source
AI summary
A switch circuit includes a first switch element defined by an FET, and an active snubber circuit connected between a drain and a source of the first switch element and including a second switch element defined by an FET, a capacitor connected in series to the second switch element, a third switch element connected to a gate of the second switch element and turned on to extract an electric charge of capacitance between the gate and a source of the second switch element, and a delay circuit that turns on the third switch element at a timing delayed from a timing at which the second switch element is turned on.