Active Thermal Interposer for Individual Die Temperature Control
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Solution Overview
Problem
Current methods for environmental testing of integrated circuits, particularly at the wafer level, face challenges in precise heating and cooling of individual dies within a wafer, limiting the ability to perform effective wafer-level testing under environmental conditions.
Innovation Solution
The development of wafer scale active thermal interposer devices that include a thermal interposer layer with discretely controllable thermal zones and a cold plate for cooling, allowing for selective heating and temperature control of different areas of the wafer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional environmental chambers are used for testing integrated circuits, then the devices can be tested under controlled environmental conditions, but the testing rate is limited due to the large volume of air and mass of mounting structures required within the chamber
Solution Approach 1:
The patent divides the wafer into multiple discrete testable units (individual dies) that can be tested simultaneously or sequentially, eliminating the need for a single large environmental chamber. Each die can be independently thermal-controlled, allowing parallel testing operations and significantly increasing throughput.
Solution Approach 2:
The patent introduces a wafer-level thermal control system with heating elements and cold plates as intermediary devices between the test equipment and the dies. This allows environmental conditions to be applied directly to the wafer without requiring a large environmental chamber, enabling rapid temperature changes and high-speed testing.
2Productivity
If chamber-less test systems are used to overcome environmental chamber limitations, then testing speed improves, but precise cooling of individual dies within a wafer becomes difficult
Solution Approach 1:
The thermal control system is segmented into discrete heating zones corresponding to individual dies or groups of dies on the wafer. Each zone can be independently controlled, allowing precise thermal management of individual dies while maintaining high testing speed in a chamber-less environment.
Solution Approach 2:
The patent applies local thermal control by positioning heating elements and cold plates to provide differentiated thermal conditions to different regions of the wafer. This enables precise cooling or heating of specific dies according to their individual testing requirements, achieving both speed and precision.
3Productivity
If wafer-level testing is implemented to increase manufacturing throughput, then testing efficiency improves, but precise temperature control of individual dies becomes unavailable under conventional art
Solution Approach 1:
The wafer is divided into multiple independently controllable thermal zones, each corresponding to one or more individual dies. This segmentation enables simultaneous wafer-level processing for high throughput while maintaining the ability to precisely control the temperature of each individual die according to its specific testing requirements.
Solution Approach 2:
The thermal control system is made dynamic and adaptive, allowing real-time adjustment of temperature for each die based on testing requirements. The system can rapidly change thermal conditions across different wafer regions, enabling both high throughput and precise individual die control that adapts to varying test conditions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enables precise temperature control of individual dies or groups of dies within a wafer, facilitating efficient wafer-level testing and identifying defective or sub-standard dies, thereby improving manufacturing throughput and reducing testing costs.
Implementation Method 1
a heating element layer (250) comprising a plurality of discrete and separately controllable heating elements configured to selectively heat different regions of a wafer (120)
Implementation Method 2
A cooling fluid, e.g., comprising glycol, is circulated through a portion of the cooling structure
Implementation Method 3
A cooling fluid, e.g., comprising glycol, is circulated through a portion of the cooling structure
Data Source
AI summary
A system for testing circuits of an integrated circuit semiconductor wafer includes a tester system for generating signals for input to the circuits and for processing output signals from the circuits for testing the wafer and a test stack coupled to the tester system. The test stack includes a wafer probe for contacting a first surface of the wafer and for probing individual circuits of the circuits of the wafer, a wafer thermal interposer (TI) layer operable to contact a second surface of the wafer and operable to selectively heat areas of the wafer, and a cold plate disposed under the wafer TI layer and operable to cool the wafer. The system further includes a thermal controller for selectively heating and maintaining temperatures of the areas of the wafer by controlling cooling of the cold plate and by controlling selective heating of the wafer TI layer.