Active Via Switching for Dense 3D Chips With Lower EMI
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional vias in semiconductor integrated circuits face challenges such as electromagnetic interference (EMI), limited density due to keep-out-zones, increased power consumption, and lack of electrostatic protection, as complexity and size of chips increase.
Innovation Solution
The introduction of an active via with a thin film transistor switch element that can be turned on or off, allowing for controlled signal passage and power management, reducing EMI, increasing via density, and improving thermal and power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional vias are placed close together to increase density, then via density increases, but electromagnetic interference (EMI) and crosstalk increase
Solution Approach 1:
A dielectric material is introduced as an intermediary substance filling the via to reduce electromagnetic coupling between adjacent vias. This dielectric intermediary allows higher via density while maintaining lower EMI levels by providing electrical isolation between conductive via walls.
2Ease of manufacture
If conventional vias are used with high temperature processing, then via formation is achieved, but neighboring components are affected and timing violations occur
Solution Approach 1:
The processing temperature parameter is changed from high temperature to low temperature for via formation. This allows via creation without thermally affecting neighboring components, preventing timing violations while maintaining manufacturing feasibility through alternative low-temp processes.
3Reliability
If a large keep-out-zone is maintained around vias to protect neighboring components, then component reliability is improved, but available area for core components is reduced
Solution Approach 1:
The dielectric material acts as an intermediary protective layer within the via structure itself, eliminating the need for large external keep-out-zones. This intermediary provides the necessary protection for neighboring components while allowing much closer spacing of vias, thereby increasing core component area.
4Device complexity
If conventional passive vias are used, then simple connectivity is achieved, but control over connected circuit elements is limited
Solution Approach 1:
The via structure is transformed from a static passive connection to a dynamic controllable element by adding a switch element. This allows the via to be selectively activated or deactivated, providing adaptability for power management and circuit control while maintaining relatively simple overall structure.
5Ease of manufacture
If conventional vias are used without switching capability, then manufacturing is simpler, but power consumption cannot be reduced for unused regions
Solution Approach 1:
The via is made dynamically controllable through integration of a switch element, enabling selective activation. This allows power consumption to be reduced by turning off vias to unused regions while maintaining the ability to manufacture the structure using standard semiconductor processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Active vias effectively reduce EMI, increase via density, enhance power and thermal efficiency, and provide electrostatic protection, enabling higher stacking and modularity while minimizing power consumption by turning off unused regions.
Implementation Method 1
the at least one transistor having a source contact, a drain contact and a gate contact, wherein the source contact is in electrical contact with a first circuit element of a chip, the drain contact is in electrical contact with a second circuit element of a chip and the gate contact is in electrical contact with a third circuit element of a chip, and wherein when one of the first, second or third circuit elements applies a voltage to its respective connected contact, the source contact and the drain contact are electrically connected when the at least one transistor forms a channel
Data Source
AI summary
An active via is taught which comprises at least one via and at least one transistor which acts as a switch element. The resulting active via can be used with 1D, 2.5D or 3D chips to: control circuit elements; reduce EMI between vias; increase the density of vias; improve power and thermal efficiencies of chips; simplify power, data and other routing networks on chips; enable a higher level stacking of dies or layers in a chip while maintaining modularity; etc. A control strategy system can be provided to remove the supply of power to one or more regions of the chip when the regions are not in use and to supply power to those regions when the regions are in use, or to control input and output to regions of the chip. The active vias can be fabricated with Back or Front End Of Line processes.