Activity-Based Frequency Control for IC Performance Consistency
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Solution Overview
Problem
Integrated circuit devices within the same SKU or bin exhibit performance variations due to differences in voltage, frequency characteristics, dynamic capacitances, and leakage power, leading to inconsistent power consumption and performance disparities, which are difficult to manage with existing power budget management and internal power meter mechanisms.
Innovation Solution
Implementing an activity monitoring system that limits the running average of gate toggling per unit time, using event counts and weights, without considering leakage power or voltage, to ensure consistent performance across all devices within a SKU by adjusting the operating frequency and voltage within predetermined activity limits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If power budget management and internal power meter mechanisms are used to control power consumption, then power limits are maintained, but performance variations occur between devices within the same SKU due to differences in voltage, frequency characteristics, dynamic capacitances, and leakage power
Solution Approach 1:
The patent changes the control parameter from power-based (PBM and power meter mechanisms that consider voltage, frequency, capacitance, leakage) to activity-based (gate toggling counts). By monitoring and limiting the running average of gate toggling per unit time, the system achieves deterministic performance across all devices in a SKU without being affected by device-specific electrical characteristics variations
Solution Approach 2:
The patent replaces the complex electrical measurement system (power meters that measure voltage, frequency, capacitance, leakage power) with a simplified counting mechanism that tracks gate toggling events. This substitution eliminates the need to account for varying electrical parameters while maintaining effective power management through activity limiting
2Speed
If processors operate at higher frequencies to improve performance, then computing speed increases, but power consumption increases and thermal design power limits are exceeded
Solution Approach 1:
The patent implements dynamic frequency adjustment based on activity limits. The operating frequency is continuously adapted to maintain the running average of gate toggling within predetermined limits, allowing processors to operate at higher frequencies when activity is low and reducing frequency when activity approaches limits, thereby balancing performance and power consumption in real-time
Solution Approach 2:
The patent employs feedback mechanisms where the activity monitoring system continuously measures gate toggling and feeds this information back to the frequency control logic. This closed-loop control enables the processor to self-regulate its operating frequency to stay within power constraints while maximizing performance, with the feedback ensuring that frequency variations remain deterministic across devices
Data Source
AI summary
According to one embodiment of the invention, an integrated circuit device comprises one or more processor cores and a control unit coupled to the processor core(s). The control unit is adapted to control an operating frequency of at least one processor core based on an estimated activity level in lieu of a power level. The estimated activity level differing from an estimated power level by being independent of leakage power and voltage characteristics particular to that integrated circuit device.