Hierarchical Activity Smoothener Circuit for IC di/dt Control

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Solution Overview

Problem

Integrated circuits (ICs) face challenges in managing sudden changes in processing activity, which can cause voltage droops due to increased current demand, leading to unpredictable circuit behavior, errors, or damage, and existing solutions either react too slowly or overcompensate, while adding capacitance increases chip size and cost.

Innovation Solution

An activity smoothener circuit is introduced to control the rates of change in processing activity across ICs, using a hierarchy of smoothening circuits to limit the rate of current change (di/dt) and prevent voltage variations by adjusting activity levels, with mechanisms like 'credits' to maintain activity and prevent sudden drops in current draw.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional capacitance is added to the power distribution network to mitigate voltage droops, then voltage stability is improved, but chip area increases and manufacturing cost increases

Engineering Contradiction:
Improvevoltage stabilityVSAvoidchip area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent divides the power distribution management into hierarchical levels (tile level, cluster level, node level) with separate smoothener circuits at each level. This segmentation allows localized control of di/dt without requiring global capacitance addition, thereby maintaining voltage stability while minimizing chip area usage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The smoothener circuits predict future current demand based on activity indicators from execution units and proactively adjust the clock signal frequency before voltage droops occur. This preliminary action prevents voltage instability without needing additional capacitance to compensate for sudden current surges.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If system clock frequency is reduced to lower current demand, then voltage droop is mitigated, but processing performance deteriorates

Engineering Contradiction:
Improvevoltage stabilityVSAvoidprocessing performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The smoothener circuits dynamically adjust the clock signal frequency in real-time based on predicted current demand and di/dt constraints. Rather than using a fixed reduced frequency, the system optimizes performance by allowing higher frequencies when current demand is stable and reducing frequency only when necessary to prevent voltage droops, thus balancing reliability and productivity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system uses feedback from activity indicators generated by execution units to continuously monitor processing demand. This feedback enables the smoothener circuits to make informed decisions about clock frequency adjustment, reducing frequency only when activity patterns indicate upcoming current surges that would cause voltage droops, thereby maintaining optimal performance while ensuring voltage stability.

Inventive Principle:
Principle #23Feedback

3Loss of time

If detection sensitivity to voltage changes is increased to improve response time, then voltage droop detection is faster, but false detections increase and system stability deteriorates

Engineering Contradiction:
Improveresponse timeVSAvoidsystem stability
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

Instead of waiting for voltage droops to occur and then detecting them, the smoothener circuits perform preliminary detection of processing activity patterns and predict future current demand. This allows the system to take preventive action based on predicted di/dt violations before actual voltage changes occur, achieving fast response without the instability caused by sensitive reactive detection.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11960338B2Activity smoothener circuit controlling rates of change of localized processing activity in an integrated circuit (IC), and related methods
Publication Date: 2024.04.16 MICROSOFT TECHNOLOGY LICENSING LLC
  • US11960338B2 patent drawing
  • US11960338B2 patent drawing
  • US11960338B2 patent drawing

AI summary

An activity smoothener circuit is provided to control rates of change in processing activity to limit di/dt in activity areas of an IC to mitigate voltage droops or overshoots. Controlling the rate of change of activity prevents or reduces instances of a di/dt exceeding a programmed maximum that is based on physical limits of the IC and/or a package. In examples, the activity smoothener circuit includes a hierarchy of smoothening circuits controlling activity in areas down to individual circuit blocks (tiles) including execution circuits. An indication of a desired level of activity is provided to a parent smoothening circuit and the parent smoothening circuit responds with indications of actual activity allowed to occur. At each level of hierarchy, the activity smoothener circuit may use algorithms to generate indications of actual activity based on indications of desired activity and di/dt limits. Di/dt limits and current minimums and maximums are controlled.