A/D Conversion Circuit Using TDC Phase Measurement

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing A/D conversion devices require complex circuits with multiple pulse-position digitizer sections and sampling clocks to maintain accuracy, leading to increased complexity and cost.

Innovation Solution

An A/D conversion circuit that includes a comparison-reference-signal generator, comparator, time to digital converters, and a digital-signal generator, which uses a specific waveform comparison reference signal and time to digital conversion to accurately convert analog signals into digital values, reducing the need for multiple pulse-position digitizer sections and sampling clocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple pulse-position digitizer sections and sampling clocks with different phases are used to reduce accuracy deterioration, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
ImproveA/D conversion accuracyVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges multiple pulse-position digitizer sections into a single TDC that directly measures the phase difference between the input signal and sampling clock. This consolidation maintains measurement precision while significantly reducing device complexity by eliminating redundant circuitry

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent replaces the mechanical/approach of using multiple separate digitizer sections with a direct phase-difference measurement approach using a single TDC. This substitution maintains accuracy while simplifying the overall system architecture

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed circuit achieves high accuracy in A/D conversion with reduced circuit complexity by using time to digital converters to calculate phase differences and generate digital signals, effectively compensating for fluctuations in delay units.

Implementation Method 1

a comparator configured to compare a voltage of an input signal and a voltage of the comparison reference signal to thereby generate a first trigger signal

Methodology Applied
Scientific EffectVoltage comparison:

Implementation Method 2

a first time to digital converter configured to calculate a first time digital value corresponding to a phase difference between a reference clock signal and the first trigger signal

Methodology Applied
Scientific EffectPhase difference measurement:

Implementation Method 3

a first state transition section configured to start transition of a state based on the first trigger signal and output first state information indicating the state

Methodology Applied
Scientific EffectState transition:

Implementation Method 4

a first weight operation section configured to, in synchronization with the reference clock signal, perform, on a value based on the first state information, perform, on a value based on the first state information where the value is weighted by (the) elapsed time

Methodology Applied
Scientific EffectTime weighting:

Data Source

PatentUS11121717B2A/D conversion circuit
Publication Date: 2021.09.14 SEIKO EPSON CORP
  • US11121717B2 patent drawing
  • US11121717B2 patent drawing
  • US11121717B2 patent drawing

AI summary

An A/D conversion circuit includes a comparison-reference-signal generator section configured to generate a comparison reference signal synchronized with a sampling clock signal, a comparator configured to compare a voltage of an input signal and a voltage of the comparison reference signal to thereby generate a trigger signal, a time to digital converter configured to calculate a first time digital value, and a digital-signal generator section configured to generate, based on the first time digital value and a second time digital value, a digital signal corresponding to the voltage of the input signal. The first time to digital converter includes a state transition section configured to start transition of a state based on the trigger signal and output state information, and a weight operation section configured to, in synchronization with the reference clock signal, perform, on a value based on the state information, weighting corresponding to time elapsing and perform a predetermined arithmetic operation to thereby calculate the first time digital value corresponding to the number of transition times of the state.