A-D Converter Bit-Field Segmentation for Fast High-Resolution Conversion
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
A-D converters face challenges in achieving high resolution and precision while maintaining a small circuit scale and efficient power consumption, particularly in balancing conversion time and noise susceptibility between single-bit and multiple-bit modes.
Innovation Solution
The A-D converter employs a dual-stage process using comparators to determine high-order and low-order field values through multiple-bit conversion and successive comparison processes, respectively, with a high-order field determining section and a low-order field determining section to refine bit values, allowing for efficient digitalization of analog signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a multiple-bit mode A-D converter is used, then conversion time is reduced, but circuit scale becomes large when realizing high resolution
Solution Approach 1:
The patent divides the digital output signal into high-order field and low-order field, processing them separately through dedicated determining sections. This segmentation allows the system to achieve high-resolution conversion without requiring a fully parallel multiple-bit architecture, thus reducing circuit scale while maintaining fast conversion speed.
2Area of stationary object
If a single-bit mode A-D converter is used, then circuit scale is reduced, but conversion time increases because bits are converted one by one
Solution Approach 1:
The patent segments the conversion process into high-order field determination and low-order field determination, where the high-order field is determined through multiple-bit comparison and the low-order field is computed based on candidate values. This allows parallel processing of multiple bits in the high-order field while keeping the overall circuit scale manageable.
Solution Approach 2:
The high-order field determining section performs preliminary determination of the high-order field bits before the low-order field computing section processes the remaining bits. This preliminary action enables the system to establish a coarse approximation quickly, reducing the total conversion time compared to sequential single-bit conversion.
3Measurement precision
If high resolution is realized with narrow quantization width, then precision becomes bad because likelihood for noises increases
Solution Approach 1:
By separating the digital output into high-order and low-order fields and processing them through different determining sections, the patent reduces the quantization width within each field. This segmentation allows for better noise immunity in each sub-range while maintaining overall high resolution, as each comparator operates with a manageable threshold range.
Data Source
AI summary
An A-D converter that outputs a digital output signal obtained by digitalizing an analog input signal includes a plurality of comparators that each compare the analog input signal and an analog threshold value based on designated digital threshold data, a high-order field determining section that narrows down a data value corresponding to a high-order field of a predetermined bit number in the digital output signal based on a plurality of comparison results obtained by supplying threshold data different from one another to the plurality of comparators, a low-order field computing section that computes a plurality of candidate values for a data value corresponding to a low-order field of a predetermined bit number located at a side lower than the high-order field, and a low-order field determining section that determines a data value corresponding to the low-order field based on the plurality of candidate values.