Adaptable Router Lines for Chiplet Manycore Interconnection

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Solution Overview

Problem

Existing manycore processors have static network-on-chip (NoC) topologies that are inefficient in handling diverse communication requirements of multiple applications running concurrently, as they are optimized for specific communication patterns and lack flexibility in dynamic application mapping.

Innovation Solution

An interconnection network with adaptable links and routers that can be dynamically reconfigured to form various topologies such as mesh, torus, tree, and cmesh based on the characteristics of the software applications, using multiplexers and link controllers to selectively connect routers and form express links, allowing for dynamic routing and efficient resource allocation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If static NoC topologies are used, then the network is optimized for specific communication patterns, but it lacks flexibility in handling diverse communication requirements of multiple applications

Engineering Contradiction:
Improveflexibility in handling diverse communication requirementsVSAvoidnetwork reconfiguration complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic reconfiguration of NoC topologies by introducing reconfigurable links and routers that can change their connectivity patterns based on application requirements. The system transitions from static to dynamic topology adaptation, allowing the network to reconfigure itself for different communication patterns while managing complexity through automated control mechanisms

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the connectivity parameters of the NoC by introducing reconfigurable links that can alter their routing behavior and topological relationships. This allows the same physical infrastructure to support multiple logical topologies (mesh, torus, fat-tree, etc.) by dynamically adjusting connection parameters based on application needs

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If preconfigured links are used in passive interposers, then the interconnection is simple and reliable, but the communication paths are limited to predetermined routes

Engineering Contradiction:
Improvecommunication path flexibilityVSAvoidinterposer complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent transforms passive interposers with fixed links into active reconfigurable interposers that can dynamically establish communication paths. The interposer includes reconfigurable links and control logic that enable runtime adaptation of communication routes between chiplets, transitioning from predetermined static paths to flexible dynamic paths

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent makes the interposer universal by enabling it to support multiple communication topologies and patterns through reconfiguration. The same interposer infrastructure can serve different application requirements by dynamically adjusting its connectivity, making it multi-functional rather than dedicated to a single topology

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If active interposers with preconfigured routers are used, then additional on-chip communication fabric is provided, but the routers enable only preconfigured communication paths

Engineering Contradiction:
Improvedynamic routing capabilityVSAvoidrouter reconfiguration complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces dynamically reconfigurable routers in the active interposer that can change their routing tables and path configurations at runtime. This allows the routers to adapt to different application communication patterns rather than being locked into preconfigured paths, enabling dynamic route establishment

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements feedback mechanisms where the NoC monitoring application communication patterns and performance metrics, then using this information to dynamically reconfigure router paths and link configurations. This closed-loop control enables adaptive optimization of communication routes based on actual traffic demands

Inventive Principle:
Principle #23Feedback

4Productivity

If the NoC topology is optimized for a given communication performance, then efficiency for that pattern is improved, but it becomes inefficient in satisfying various communication requirements of different applications

Engineering Contradiction:
Improvecommunication throughputVSAvoidapplication-specific optimization
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent enables dynamic optimization of NoC topology by reconfiguring links and routers based on detected application communication patterns. The system monitors traffic characteristics and dynamically adjusts the network topology to optimize throughput for each application's specific requirements, transitioning from static optimization to dynamic application-specific optimization

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies local quality optimization by reconfiguring specific portions of the NoC topology based on local communication patterns of individual applications. Different regions or paths of the network can be optimized for different communication requirements simultaneously, allowing each application to receive tailored optimization without affecting others

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11489788B2Interconnection network with adaptable router lines for chiplet-based manycore architecture
Publication Date: 2022.11.01 GEORGE WASHINGTON UNIVERSITY
  • US11489788B2 patent drawing
  • US11489788B2 patent drawing
  • US11489788B2 patent drawing

AI summary

An interconnection network for a processing unit having an array of cores. The interconnection network includes routers and adaptable links that selectively connect routers in the interconnection network. For example, each router may be electrically connected to one or more of the adaptable links via one or more multiplexers and a link controller may control the multiplexers to selectively connect routers via the adaptable links. In another example, adaptable links may be formed as part of an interposer and the link controller selectively connect routers via the adaptable links in the interposer using interposer switches. The adaptable links enable the interconnection network to be dynamically partitioned. Each of those partitions may be dynamically reconfigured to form a topology.