Adapter Board Multiplexing IO Card Status Signals

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing data storage systems with printed circuit boards face limitations in expanding the number of remote IO cards without adding more pins, making it difficult to support multiple hot pluggable/hot removable IO cards while maintaining system operation.

Innovation Solution

An adapter board that combines status signals into a single signal, allowing the processor to interpret the condition of the adapter board and IO cards, enabling the detection of proper or improper conditions and requesting resets as needed, thus allowing multiple IO cards to communicate through a single wire without additional pins.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple remote IO cards are connected through the printed circuit board, then the data storage capacity can be expanded, but the number of available pins on the printed circuit board is limited and cannot support additional cards

Engineering Contradiction:
Improveexpandability of data storage systemVSAvoidlimitation of pins on printed circuit board
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent combines multiple status signals (Power Good, Reset, Insert) from multiple remote IO cards into a single multiplexed signal line. The adapter board multiplexes these signals by placing them on the same wire at different times, allowing multiple IO cards to communicate status information through a single pin connection to the storage processor, thereby enabling system expansion without requiring additional pins on the printed circuit board

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements periodic signaling where different status signals are transmitted at different time intervals. The Power Good signal is asserted periodically when power is stable, the Reset signal is pulsed periodically when a reset is needed, and the Insert signal is asserted periodically when an IO card is inserted. This time-division multiplexing allows multiple signals to share a single wire without conflict, resolving the pin limitation issue

Inventive Principle:
Principle #19Periodic action

2Reliability

If status signals are transmitted through the printed circuit board for remote IO cards, then the IO cards can be monitored, but the signals cannot distinguish between proper conditions and reset requests

Engineering Contradiction:
Improvestatus monitoring capabilityVSAvoidsignal interpretation ambiguity
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent prevents signal ambiguity by establishing predetermined timing relationships between signal assertions. The Reset signal is designed to be asserted for a specific predetermined time period, while the Power Good and Insert signals have different assertion patterns. This preliminary design of distinct temporal characteristics allows the storage processor to reliably distinguish between a reset request (signal asserted for predetermined time) and proper operating conditions (signal asserted differently), eliminating information loss in signal interpretation

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The system implements feedback through the multiplexed signal line where the storage processor can detect the status of remote IO cards and send control signals back through the same line. The adapter board monitors the multiplexed signal and provides feedback to the storage processor about the actual state of each IO card, ensuring reliable bidirectional communication despite using a single wire

Inventive Principle:
Principle #23Feedback

3Device complexity

If a single signal line is used to communicate multiple status signals, then the pin count is reduced, but the processor must interpret timing to distinguish between different signal types

Engineering Contradiction:
Improvereduction of pins requiredVSAvoidsignal interpretation complexity
Core Design Contradiction:
Device complexityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent simplifies detection by pre-establishing clear temporal patterns for each signal type. The Reset signal is asserted for a predetermined time period that is longer than the assertion time for Power Good or Insert signals. This preliminary design of distinct timing patterns allows the storage processor to automatically distinguish signal types based on duration alone, reducing the complexity of signal interpretation while maintaining pin reduction benefits

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7711869B1Method for communicating plural signals generated at a source to a remote destination through a single wire
Publication Date: 2010.05.04 EMC IP HLDG CO LLC
  • US7711869B1 patent drawing
  • US7711869B1 patent drawing
  • US7711869B1 patent drawing

AI summary

A system having a processor, a printed circuit board, and an adapter board, coupled to the processor through the printed circuit board. The adapter board provides a first signal having a first state when the adapter board is in a proper operating condition and a second state when the adapter board is in an improper condition. The adapter board produces a second signal having the second state for less than a predetermined time when an adapter board requires a reset signal from the processor. The adapter board combines the first signal with the second signal a single signal fed to the processor through the printed circuit board. When the processor detects that the single signal is in the second state for a time less than the predetermined period of time, the process interprets the single signal as indicating the adapter board requires a reset.