Adapter Card Aggregating PCIe Lanes for Remote Processing

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Solution Overview

Problem

Current computer modules, such as COM Express, often have underpowered CPUs that fail to meet user demands for performance, requiring users to wait for new modules with more advanced processors, and these modules typically have fewer cores and less cache compared to server processors.

Innovation Solution

An adapter card with a computer module form factor is used, which aggregates PCIe lanes and employs a transceiver to establish a communication link with a remote processor device, such as a multi-Xeon server, providing increased processing power to the circuit board, using optical or copper links to connect the adapter card to the external processor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If a computer module with an integrated CPU is used, then the device provides basic computing functionality, but the CPU is underpowered and cannot meet user performance demands

Engineering Contradiction:
Improveprocessing powerVSAvoidperformance capability
Core Design Contradiction:
PowerVSAdaptability or versatility

Solution Approach 1:

The system is divided into two functional parts: a remote processor device that provides the powerful CPU resources and a local adapter card that provides the form factor and interface. This segmentation allows the computing functionality to be separated from the physical form factor, enabling the use of powerful server-grade processors while maintaining the compact module appearance.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The adapter card acts as an intermediary between the remote processor device and the local circuit board. It aggregates PCIe lanes and uses a transceiver to establish communication links, serving as a mediator that transfers processing power and data from the remote location to the local system without requiring the remote device to be physically present.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Power

If a computer module with fewer CPU cores and less cache is used, then the device remains compact and cost-effective, but the processing performance is insufficient for demanding applications

Engineering Contradiction:
Improveprocessing performanceVSAvoidmodule complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The system moves the processor from the same physical dimension (integrated on the module board) to a different dimension (remote location connected via communication link). This spatial separation allows the remote processor to have many more cores and larger cache without increasing the physical complexity or size of the local module.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Power

If the adapter card aggregates multiple PCIe lanes through a switch, then the bandwidth and processing capability are increased, but the device complexity and component count increase

Engineering Contradiction:
ImprovebandwidthVSAvoidadapter card complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

Multiple PCIe lanes are merged into a single aggregated connection through a switch component. This combining approach consolidates multiple parallel data paths into one unified communication channel, increasing the effective bandwidth while using a single transceiver pair for the remote connection.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9928198B2Adapter card with a computer module form factor
Publication Date: 2018.03.27 ORACLE INT CORP
  • US9928198B2 patent drawing
  • US9928198B2 patent drawing
  • US9928198B2 patent drawing

AI summary

A system includes a circuit board with a Peripheral Component Interconnect Express (“PCIe”) backplane. The backplane is configured to receive processing power from a computer module. An adapter card having a computer module form factor is coupled to the PCIe backplane instead of the computer module. The adapter card includes a switch that aggregates one or more PCIe lanes and a transceiver. A communication link couples the transceiver to a remote processor device, which provides processing power to the circuit board.