Adaptive Address Translation Cache Configuration for Variable Page Sizes

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Solution Overview

Problem

Existing Address Translation Caches (ATCs) in peripheral devices face challenges in efficiently managing varying and unpredictable page sizes, leading to resource waste or poor utilization due to static configurations, which can impact memory-access performance.

Innovation Solution

The implementation of an Address Translation Service (ATS) controller that adaptively configures ATCs based on statistical properties of received address translations, dynamically adjusting page sizes and memory allocation to match actual usage patterns, thereby optimizing resource utilization and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If static configuration is used for ATC page sizes, then device complexity is reduced, but resource utilization deteriorates due to inability to adapt to varying page size distributions

Engineering Contradiction:
ImproveATC configuration complexityVSAvoidATC adaptability to page size distribution
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic configuration of ATC page sizes by continuously monitoring the distribution of page sizes in address translation requests and automatically adjusting the ATC structure to match the observed distribution. This allows the system to adapt to varying workloads without manual intervention, resolving the contradiction between static simplicity and dynamic adaptability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the parameters of the ATC (specifically page size distribution) based on statistical analysis of incoming address translation requests. By modifying these parameters dynamically, the system optimizes resource utilization while maintaining manageable complexity through automated adjustment.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If ATC is configured to handle all possible page sizes, then adaptability is improved, but device complexity and resource waste increase due to provisioning for unused configurations

Engineering Contradiction:
ImproveATC page size coverageVSAvoidATC configuration overhead
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by configuring different page sizes in different portions of the ATC based on the local distribution patterns observed in address translation requests. Rather than uniformly provisioning for all possible page sizes, the system tailors the ATC structure to the specific needs of each address translation stream, reducing overall complexity while maintaining necessary adaptability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system performs partial action by provisioning ATC entries only for the page sizes that are actually needed based on statistical analysis, rather than excessively provisioning for all possible page sizes. This approach maintains adaptability for the observed workload while avoiding the complexity and resource waste of universal coverage.

Inventive Principle:
Principle #16Partial or excessive action

3Productivity

If ATC size is increased to improve caching performance, then memory-access efficiency is improved, but resource consumption increases

Engineering Contradiction:
Improveaddress translation handling rateVSAvoidmemory resources consumed
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent implements dynamic sizing of the ATC by monitoring cache miss rates and adjusting the ATC capacity accordingly. When cache miss rates indicate insufficient caching capacity, the system expands the ATC; when the ATC is sufficiently large, the system reduces its size to conserve memory resources. This dynamic adjustment resolves the contradiction between caching performance and resource consumption.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system uses feedback from cache miss rate measurements to continuously adjust the ATC size. By monitoring the performance metric (cache miss rate) and adjusting the resource allocation (ATC size) based on this feedback, the system optimizes the balance between productivity and resource consumption.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250217302A1Adaptive Configuration of Address Translation Cache
Publication Date: 2025.07.03 MELLANOX TECHNOLOGIES LTD(IL)
  • US20250217302A1 patent drawing
  • US20250217302A1 patent drawing

AI summary

A peripheral device includes a bus interface and an Address Translation Service (ATS) controller. The bus interface is to communicate over a peripheral bus. The ATS controller is to communicate over the peripheral bus, including sending address translation requests and receiving address translations in response to the address translation requests, to cache at least some of the address translations in one or more Address Translation Caches (ATCs), to estimate one or more statistical properties of the received address translations, and to configure the one or more ATCs based on the one or more statistical properties.