Adaptive Asynchronous Sample Rate Conversion via Fractional Delay Feedback
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Solution Overview
Problem
Communications devices face challenges in processing digital audio signals with different sample rates, particularly when these rates are asynchronous, as existing technologies struggle to efficiently convert and synchronize signals across different clock frequencies.
Innovation Solution
A system incorporating a buffer and a variable fractional delay filter, along with a feedback loop, generates a fractional delay to synchronize and convert input samples to output samples across asynchronous sample rates, enabling adaptive asynchronous sample rate conversion and tracking frequency variations between input and output sampling clocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If asynchronous sample rate conversion is implemented, then compatibility between devices with different sample rates is improved, but system complexity increases due to the need for adaptive fractional delay filtering and feedback loops
Solution Approach 1:
The patent implements dynamic sample rate conversion by using a feedback loop that continuously adjusts the fractional delay filter coefficients based on the actual sample rate difference between input and output. This allows the system to adapt to varying asynchronous sample rates in real-time, improving compatibility while managing complexity through adaptive rather than static processing
Solution Approach 2:
The system changes the delay parameter dynamically by calculating fractional delays based on the ratio of input to output sample rates. The feedback loop monitors the actual sample rate conversion ratio and adjusts the filter parameters accordingly, enabling the system to handle different asynchronous sample rate combinations without requiring multiple fixed conversion paths
2Measurement precision
If fractional delay filtering is used for accurate sample rate conversion, then signal processing accuracy is improved, but computational requirements and processing time increase
Solution Approach 1:
The patent applies partial action by using a finite impulse response (FIR) filter with a limited number of taps rather than an infinite impulse response. This provides sufficient accuracy for audio sample rate conversion while constraining the computational load to a manageable level, balancing precision with processing time requirements
Solution Approach 2:
The system performs preliminary calculation of the fractional delay value based on the known or measured sample rate ratio before applying the filter. This pre-calculation allows the filter to be configured optimally in advance, reducing the computational burden during actual signal processing and minimizing real-time processing time
3Measurement precision
If a feedback loop is implemented to track frequency variations, then synchronization accuracy is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent implements a feedback loop that monitors the actual sample rate conversion ratio and adjusts the fractional delay filter accordingly. This feedback mechanism maintains synchronization accuracy by continuously tracking frequency variations between input and output clocks, ensuring accurate sample rate conversion even when clock frequencies drift
Solution Approach 2:
The feedback loop is designed to be self-regulating, automatically adjusting the filter parameters based on the measured sample rate ratio without requiring external intervention. The system uses its own output to control its input, creating a self-correcting mechanism that maintains accuracy while minimizing the need for additional control circuitry and power
Data Source
AI summary
A system including a buffer, a feedback loop configured to generate a fractional delay from a ratio of a first number of samples written into the buffer to a second number of samples read from the buffer, and a variable fractional delay filter configured to generate an output sample using a plurality of input samples and the fractional delay is provided.