Adaptive Background Scans for Memory Sub-System Reliability

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Solution Overview

Problem

Traditional background scanning techniques in memory sub-systems are inadequate as they fail to account for variability in memory device quality and error occurrence patterns, leading to insufficient scanning and reduced performance and reliability.

Innovation Solution

Adaptive background scanning methodology that leverages error data to identify high-risk locations within memory devices, increasing scan frequency on these areas and focusing on worst-case sections, thereby improving reliability and efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional background scanning techniques are used, then the memory sub-system operates with simple scanning procedures, but the reliability is reduced due to insufficient scanning of high-risk areas

Engineering Contradiction:
Improvememory sub-system reliabilityVSAvoidscan coverage efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies local quality by differentiating scan frequencies across different memory locations based on their error characteristics. High-risk locations identified through error logs receive increased scan frequencies, while low-risk locations maintain standard scanning rates. This localized approach optimizes reliability for critical areas without unnecessarily increasing overall scan workload.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements feedback mechanisms by continuously monitoring error events and updating the error log to identify high-risk locations. The system uses this feedback information to dynamically adjust background scan priorities, ensuring that locations with higher error rates receive more frequent scanning. This closed-loop feedback improves reliability by adapting scan resources to actual device conditions.

Inventive Principle:
Principle #23Feedback

2Reliability

If scan frequency is increased across all locations, then reliability improves, but the time and resources consumed increase

Engineering Contradiction:
Improvedevice reliabilityVSAvoidbackground scan time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies local quality by differentiating scan frequencies across different memory locations based on their error characteristics. High-risk locations identified through error logs receive increased scan frequencies, while low-risk locations maintain standard scanning rates. This localized approach optimizes reliability for critical areas without unnecessarily increasing overall scan workload.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent applies partial action by concentrating scanning resources on specific high-risk locations rather than uniformly scanning all memory areas. The error log identifies particular locations that require intensified monitoring, allowing the system to apply excessive scanning action only where needed while maintaining normal operation elsewhere, thus reducing overall time loss.

Inventive Principle:
Principle #16Partial or excessive action

3Productivity

If adaptive background scanning is implemented, then efficiency improves by focusing on high-risk areas, but the complexity of the system increases

Engineering Contradiction:
Improvebackground scan efficiencyVSAvoidscanning system complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies self-service by enabling the memory sub-system to automatically identify and prioritize high-risk locations using its own error logging capabilities. The system serves itself by generating the intelligence needed to optimize its scanning behavior without requiring external control or complex external management, thereby improving efficiency while limiting the growth of external system complexity.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent applies preliminary action by pre-identifying high-risk locations through error logging before background scans are performed. The error log is continuously updated with error event information, allowing the system to have advance knowledge of which locations require prioritized scanning. This preliminary identification simplifies the scanning decision process and improves efficiency without requiring complex real-time analysis during scans.

Inventive Principle:
Principle #10Preliminary action

4Measurement precision

If error logging and analysis are performed, then high-risk locations can be identified for targeted scanning, but the processing overhead increases

Engineering Contradiction:
Improveerror location identification accuracyVSAvoidprocessing energy consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies extraction by isolating and focusing processing attention only on error-related information from memory operations. Rather than analyzing all memory activity, the system extracts specific error events and uses them to identify high-risk locations. This selective extraction reduces processing overhead while maintaining accurate identification of locations requiring enhanced scanning.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11797376B2Adaptive background scans in a memory sub-system
Publication Date: 2023.10.24 MICRON TECHNOLOGY INC
  • US11797376B2 patent drawing
  • US11797376B2 patent drawing
  • US11797376B2 patent drawing

AI summary

A log of error events associated with a memory device is maintained. Each error event included in the log is associated with one of multiple physical locations within the memory device. A physical location within the memory device is identified for background scanning based on the log of error events. A background scan is performed on the physical location identified based on the log of error events.