Adaptive Bias Control for Near-Subthreshold Speed and Yield
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Solution Overview
Problem
Current Near/Sub-threshold technology for semiconductor integrated circuits faces limitations in performance and yield due to low operating voltage, which restricts its use in commercial chips, and existing methods focus primarily on power reduction without optimizing for specific applications or improving yield.
Innovation Solution
Adaptive dynamic forward and reverse bias voltage control of silicon transistors using sensors and software algorithms to optimize power consumption while maintaining reasonable speed, implemented through programmable DACs and sensors within the chip to balance voltage for N-ch and P-ch transistors, addressing VT variance and temperature variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If transistors operate at Near/Sub-threshold voltage to reduce power consumption, then power consumption is reduced, but operating speed deteriorates
Solution Approach 1:
The patent implements dynamic bias voltage adjustment where the forward bias voltage (VFB) and reverse bias voltage (VRB) are continuously adapted based on real-time temperature and process variation measurements. This dynamic control allows the transistor to operate optimally across different conditions, maintaining higher speed performance while keeping power consumption low in the Near/Sub-threshold domain.
Solution Approach 2:
The patent changes the bias voltage parameters (VFB and VRB) as control variables to optimize transistor performance. By adjusting these voltage parameters based on measured temperature and process variations, the system can compensate for performance degradation and maintain acceptable operating speed while operating at reduced voltages for low power consumption.
2Use of energy by moving object
If transistors operate at Near/Sub-threshold voltage to reduce power consumption, then power consumption is reduced, but yield deteriorates due to VT variation
Solution Approach 1:
The patent incorporates feedback mechanisms where sensors continuously measure temperature and process variations, and this information is fed back to adjust the bias voltages. This closed-loop control compensates for VT variations between P-ch and N-ch transistors, ensuring consistent performance across different process corners and improving manufacturing yield while maintaining low power operation.
Solution Approach 2:
The patent adjusts bias voltage parameters (VFB and VRB) based on measured process variations and temperature to compensate for VT mismatches. By dynamically changing these parameters, the system can equalize the performance of P-ch and N-ch transistors across different process conditions, thereby improving yield for high volume production.
3Device complexity
If fixed bias voltage is used to simplify control, then device complexity is reduced, but performance optimization deteriorates
Solution Approach 1:
The patent implements a self-adjusting control system where the bias voltages are automatically optimized based on real-time measurements of temperature and process variations. The system uses embedded sensors and control logic to self-correct performance deviations without requiring external intervention, achieving near-optimal performance while keeping the control interface relatively simple through automated feedback loops.
Data Source
AI summary
A method for implementing a Semiconductor Integrated Circuit device using Near/Sub-threshold technology with SW programmable adaptive and dynamic forward and reverse bias voltage control using different sensors inside the chip in order to improve speed, reduce leakage and ensure high yield of the final product that operates at an ultra-low power consumption. This method allows achieving ultra-low power solution with reasonable higher speed and insure high yield.