Adaptive Bias Current Generator for Power Reduction

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Solution Overview

Problem

Conventional electronic devices, such as A/D converters and power amplifiers, dissipate excess power due to constant bias currents, even when operating at lower speeds or under optimal conditions, leading to sub-optimal power consumption.

Innovation Solution

Adaptive bias current generation techniques that adjust bias currents non-linearly based on reference clock frequency and capacitance, ensuring optimal power consumption by matching current levels to actual operating conditions rather than worst-case scenarios.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If constant bias current is used to ensure adequate operation at maximum speed, then the circuit can operate correctly at maximum operating speed, but the circuit dissipates excess power when operating at lower speeds

Engineering Contradiction:
Improvemaximum operating speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The bias current is made dynamic rather than constant, allowing it to adjust automatically according to the operating speed requirements. The circuit monitors the actual operating speed and modulates the bias current accordingly, increasing it when maximum speed is required and reducing it when lower speeds suffice, thereby eliminating unnecessary power consumption while maintaining adequate operation at all speeds

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The bias current parameter is changed based on operating conditions. The circuit detects the actual operating speed and adjusts the bias current parameter to match the required performance level, transitioning from a fixed parameter approach to a variable parameter approach that optimizes power consumption across different operating points

Inventive Principle:
Principle #35Parameter changes

2Reliability

If bias current is designed for worst case conditions, then the circuit will not malfunction under any conditions, but the circuit dissipates maximum power even when conditions require substantially less power

Engineering Contradiction:
Improvecircuit operation reliabilityVSAvoidexcess power dissipation
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The circuit incorporates feedback mechanisms that monitor actual operating conditions and use this information to adjust the bias current. By continuously comparing actual performance with required performance, the feedback system modulates the bias current to maintain reliable operation while avoiding excessive power consumption, eliminating the need to design for worst-case conditions at all times

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The circuit serves itself by automatically detecting its own operating conditions and adjusting its bias current accordingly. The self-monitoring and self-adjustment capabilities allow the circuit to maintain reliability without external intervention while optimizing power consumption based on actual rather than worst-case conditions

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8339118B2Adaptive bias current generator methods and apparatus
Publication Date: 2012.12.25 ANALOG DEVICES INC
  • US8339118B2 patent drawing
  • US8339118B2 patent drawing
  • US8339118B2 patent drawing

AI summary

In one aspect, a method of reducing power consumption in a circuit by adaptive bias current generation of a bias current configured to bias, at least in part, at least one amplifier of the circuit is provided. The method comprises establishing the bias current based, at least in part, on a reference frequency of a reference clock providing a clock signal to at least one component of the circuit, and changing the bias current in response to a change in the reference frequency of the at least one reference clock, the bias current being change non-linearly with respect to the change in the reference frequency of the at least one reference clock. In another aspect, the method comprises establishing the bias current based, at least in part, on a capacitance of a reference capacitor, and changing the bias current in response to a change in the capacitance of the reference capacitor such that the bias current is changed non-linearly with respect to changes in the capacitance of the reference capacitor.