Adaptive Word Line Bias Decoding for Accurate NVM Synapse Weights
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing artificial neural networks face challenges in achieving high-performance information processing due to a lack of adequate hardware technology, particularly in terms of energy efficiency and scalability, as CMOS-implemented synapses are bulky and inefficient compared to biological networks.
Innovation Solution
Utilizing non-volatile memory arrays as synapses in artificial neural networks, which allow for continuous and precise tuning of memory states, enabling efficient vector-matrix multiplication and reducing the need for separate multiplication and addition logic circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If CMOS analog circuits are used for artificial neural networks, then the neural network can be implemented with standard semiconductor technology, but the synapses become bulky and energy inefficient
Solution Approach 1:
The patent replaces CMOS analog circuit implementation with non-volatile memory array implementation for synapse functionality. The memory array naturally performs multiply-accumulate operations through its physical structure, eliminating the need for bulky CMOS analog circuits while achieving superior energy efficiency and scalability.
Solution Approach 2:
The non-volatile memory array serves multiple functions simultaneously: it stores synapse weights, performs multiplication operations, and accumulates results, all within a single unified structure. This multi-functionality eliminates the need for separate multiplication and addition logic circuits, reducing hardware complexity and improving energy efficiency.
2Use of energy by moving object
If non-volatile memory arrays are used as synapses, then energy efficiency and scalability are improved, but precise control of word line voltage is required to maintain accurate synapse weights
Solution Approach 1:
The patent implements a feedback mechanism where the adaptive bias decoder continuously monitors the actual word line voltage and compares it against the ideal voltage. Based on this comparison, the decoder dynamically adjusts the bias voltage to compensate for deviations, ensuring accurate synapse weight maintenance without requiring overly complex control circuitry.
Solution Approach 2:
The bias voltage is made dynamic rather than static. The adaptive bias decoder continuously adjusts the word line voltage based on actual operating conditions and measured deviations, allowing the system to adapt to changing conditions while maintaining precision. This dynamic approach simplifies the overall control architecture compared to static high-precision designs.
3Measurement precision
If the word line voltage deviates from the ideal voltage, then the synapse weights become inaccurate, but adjusting the voltage requires additional control circuitry
Solution Approach 1:
The adaptive bias decoder employs feedback control by measuring the actual word line voltage, comparing it to the target voltage, and adjusting the bias accordingly. This closed-loop approach maintains high measurement precision for synapse weights while using a relatively simple control circuitry that adapts to voltage deviations rather than requiring complex preventive control mechanisms.
Data Source
AI summary
In one example, a non-volatile memory system comprises an array of non-volatile memory cells arranged in rows and columns, each non-volatile memory cell comprising a source and a drain; a plurality of bit lines, each of the plurality of bit lines coupled to the drain of each non-volatile memory cell in a column of non-volatile memory cells; a source line coupled to the source of each non-volatile memory cell; and an adaptive bias decoder for providing a voltage to a word line of the array during an operation, wherein the adaptive bias decoder adjusts the voltage provided to the word line in response to changes in a voltage of the source line.