Adaptive Bias Circuit for Voltage Regulator Load Response
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Solution Overview
Problem
Conventional voltage regulators face challenges in achieving optimal performance parameters such as low no-load quiescent current, fast transient response, low noise, and high power supply rejection ratio (PSRR) across a wide range of load currents, due to limitations in adaptive bias control.
Innovation Solution
The implementation of an adaptive bias current source circuit in conjunction with an error amplifier system and a voltage offset generator, which adjusts the bias current based on the load current, ensuring efficient control of the power transistor and sense transistor to maintain a stable output voltage and reduce quiescent current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a voltage regulator uses a fixed bias current for the error amplifier, then the circuit complexity is low, but the performance parameters (transient response, PSRR, noise) cannot be optimized across a wide range of load currents
Solution Approach 1:
The patent implements dynamic bias control by making the error amplifier's bias current variable rather than fixed. The bias current is dynamically adjusted based on the load current through a control circuit that senses the load current and modulates the bias current accordingly, enabling the system to adapt to different operating conditions and optimize performance parameters across the full load range.
Solution Approach 2:
The patent employs feedback mechanisms where the load current is sensed and fed back to the bias control circuit. This feedback loop allows the system to automatically adjust the error amplifier's bias current in response to changes in load conditions, ensuring optimal performance without requiring manual intervention or complex external control.
2Reliability
If the bias current is increased to improve transient response and PSRR, then the transient response and PSRR improve, but the no-load quiescent current increases
Solution Approach 1:
The patent dynamically adjusts the bias current based on the actual load conditions. During transient events or when high PSRR is needed, the bias current is increased to improve response and rejection characteristics. During steady-state low-load operation, the bias current is reduced to minimize quiescent current consumption, thus resolving the contradiction between performance and power efficiency.
Solution Approach 2:
The patent changes the bias current parameter dynamically according to operating conditions. By modulating this key parameter based on load current, the system achieves high transient response and PSRR when needed while maintaining low quiescent current during normal operation, effectively resolving the trade-off between reliability and energy consumption.
3Use of energy by moving object
If the bias current is decreased to reduce no-load quiescent current, then the power efficiency improves, but the transient response and PSRR deteriorate
Solution Approach 1:
The system dynamically switches between low bias current mode for power efficiency and high bias current mode for performance. The control circuit detects transient conditions or disturbances and temporarily increases the bias current to maintain adequate transient response and PSRR, then returns to low bias current mode to preserve power efficiency during steady-state operation.
Solution Approach 2:
The bias current is periodically or event-driven adjusted rather than maintained at a constant level. The control circuit monitors operating conditions and applies bias current increases only when transient events occur or performance degradation is detected, allowing the system to maintain power efficiency while providing performance enhancement when needed.
Data Source
AI summary
One example includes a circuit. The circuit includes a first transistor having a first control terminal, a first current terminal, and a second current terminal. The first control terminal can be a first input to the circuit. The circuit also includes a second transistor having a second control terminal, a first current terminal, and a second current terminal. The second control terminal can be a second input to the circuit. The circuit also includes an adaptive bias current source coupled to the second current terminal of the respective first and second transistors. The circuit further includes a voltage offset generator coupled in parallel with the second transistor.