Adaptive Op-Amp Biasing in Switched-Capacitor Circuits
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Solution Overview
Problem
Conventional switched-capacitor circuits consume excessive power due to the use of operational amplifiers that are designed to handle the fastest sampling frequency, even when operating at slower frequencies, leading to inefficient power usage and response times.
Innovation Solution
The implementation of an adaptive bias current system that adjusts the operational amplifier's bandwidth and power consumption based on the active time of control pulses, ensuring optimal performance and power usage across varying sampling frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the operational amplifier is designed to handle the fastest sampling frequency, then the response time is adequate for all sampling frequencies, but the power consumption is excessive when operating at slower frequencies
Solution Approach 1:
The patent implements dynamic adjustment of the operational amplifier's bias current based on the actual sampling frequency being used. The bias current is varied in real-time to match the operational requirements, allowing the amplifier to operate at optimal power levels for each sampling frequency while maintaining adequate response time. This resolves the contradiction by making the system adaptable rather than statically optimized for worst-case conditions.
Solution Approach 2:
The patent changes the bias current parameter of the operational amplifier according to the sampling frequency. By adjusting this key parameter, the amplifier's power consumption and response characteristics are optimized for the current operating conditions. This allows the system to maintain adequate response time at each sampling frequency while minimizing power consumption, rather than always operating at maximum specifications.
2Reliability
If the operational amplifier is designed for worst-case PVT conditions, then the circuit reliability is maintained under all conditions, but the power consumption is excessive under better PVT conditions
Solution Approach 1:
The patent dynamically adjusts the bias current based on monitored PVT conditions and actual sampling frequency requirements. Rather than maintaining fixed worst-case biasing, the system adapts the bias current in real-time to match actual operating conditions, maintaining reliability when needed while reducing power consumption under better conditions.
Solution Approach 2:
The patent implements a self-adjusting bias current mechanism that monitors the operational amplifier's performance and automatically adjusts the bias current to maintain adequate operation. This self-service approach allows the circuit to maintain reliability through feedback control while minimizing power consumption by avoiding excessive bias current under non-worst-case conditions.
3Loss of time
If a fast operational amplifier is used, then the settling time is adequate for the fastest sampling frequency, but the power consumption is higher than necessary for slower sampling frequencies
Solution Approach 1:
The patent implements dynamic bias current adjustment that correlates the operational amplifier's speed characteristics with the actual sampling frequency requirements. The bias current is increased only when fast settling is actually needed (high sampling frequencies) and reduced when slower operation is acceptable (lower sampling frequencies), eliminating the waste of using fast amplifiers at all times.
Solution Approach 2:
The patent changes the bias current parameter to match the settling time requirements of each sampling frequency. By adjusting this parameter dynamically, the system achieves adequate settling time for each operating condition while minimizing power consumption, rather than maintaining fixed high-speed characteristics that consume excessive power at lower frequencies.
Data Source
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AI summary
Exemplary embodiments of the disclosure include adaptively generating a bias current for a switched-capacitor circuit. An exemplary apparatus includes a first phase signal and a second phase signal operating at a sampling rate. An asserted time of the first phase signal and an asserted time of the second phase signal are separated by a predefined non-overlap time. The apparatus also includes a switched-capacitor circuit with a plurality of switched capacitors operably coupled to the first phase signal and the second phase signal. An amplifier is operably coupled to the switched-capacitor circuit and has a response time inversely proportional to an adaptive bias current. A bias generator is coupled to the amplifier and operates to modify the adaptive bias current responsive to the asserted time of the first phase signal.