Adaptive Biasing PLL for Stable Bandwidth and Low Jitter
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Solution Overview
Problem
Conventional phase locked loops (PLLs) have a narrow operating frequency range and poor jitter performance due to fixed damping ratio and loop gain, which are affected by process, voltage, and temperature variations, making it difficult to predict and control tracking bandwidth accurately.
Innovation Solution
A PLL with adaptive biasing is implemented, featuring a bias generator, a second charge pump, and a voltage buffer that replaces the loop filter resistor, allowing for a constant damping ratio and tracking bandwidth independent of VCO gain and capacitance, enabling a wider operating frequency range and improved jitter performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fixed charge pump current, VCO gain and loop filter resistance are used, then the PLL has a fixed damping ratio and fixed loop gain, but this results in narrow operating frequency range and poor jitter performance
Solution Approach 1:
The patent implements adaptive biasing that dynamically adjusts the charge pump current based on the VCO operating frequency. The bias generator receives the VCO output signal and generates a bias current proportional to the instantaneous frequency, enabling the damping ratio and loop gain to adapt automatically across different frequency ranges, thus resolving the contradiction between fixed parameters and frequency adaptability
Solution Approach 2:
The patent changes the parameter of charge pump current from fixed to variable by introducing a bias generator that produces a frequency-dependent bias current. This parameter change allows the PLL to maintain optimal damping ratio and loop gain across a wide frequency range, improving both jitter performance and operating frequency range simultaneously
2Ease of manufacture
If loop filter resistor is used, then the loop filter is simple, but the tracking bandwidth is affected by VCO gain and capacitance variations due to process, voltage, and temperature
Solution Approach 1:
The patent introduces a bias generator as an intermediary component that mediates between the loop filter and the charge pump. This bias generator converts the control voltage into a frequency-proportional bias current, which then controls the charge pump current. This intermediary approach decouples the tracking bandwidth from direct dependence on VCO gain and capacitance variations, improving stability while maintaining manufacturing simplicity
Solution Approach 2:
The bias generator receives the VCO output signal as feedback and uses it to adjust the bias current proportionally to the instantaneous frequency. This feedback mechanism ensures that the charge pump current automatically compensates for VCO parameter variations, maintaining stable tracking bandwidth across process, voltage, and temperature conditions
Data Source
AI summary
A phase locked loop including first and second charge pumps, a voltage buffer and a bias generator for adaptive biasing for improved performance. A voltage controlled oscillator, feedback circuit and phase detector portions may be provided to operate similar to conventional configurations. The first charge pump receives an adjust signal, such as from the phase detector, and selectively charges an intermediate node. The second charge pump receives the adjust signal and selectively charges a control node developing the control voltage for the VCO. A loop filter capacitor is referenced to the intermediate node. The voltage buffer, replacing the loop filter resistor, buffers the intermediate node and drives the control node. The bias generator converts the control voltage to a converter bias current based on the control voltage and adjusts the charge pump currents and a bias current of the voltage buffer.