Adaptive Blanking for Overcurrent Fault Detection in Power Gate Drivers
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Solution Overview
Problem
Conventional fault detection methods in switching power converter circuits are too slow to prevent damage from excessive power dissipation in semiconductor switches, often leading to false detections due to inflexible delay times that do not adapt to variations in power converter systems and switch characteristics.
Innovation Solution
A dynamic fault detection system that includes a comparator circuit to monitor the voltage of a power switch transistor and a delay circuit that adjusts the comparison time based on the slew rate of the monitored voltage, ensuring accurate detection of circuit faults by delaying the comparison until the transistor has stabilized after activation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional fault detection methods are used, then the detection process is simple, but the detection speed is too slow to prevent damage from excessive power dissipation
Solution Approach 1:
The patent applies dynamics by making the delay time variable rather than fixed. The delay circuit adjusts the blanking period dynamically based on the actual voltage transition characteristics of the power switch, allowing the system to adapt to different operating conditions and achieve faster detection when possible while maintaining accuracy.
Solution Approach 2:
The patent changes the parameter of delay time from a constant value to a variable parameter that depends on the voltage slew rate. By monitoring the rate of voltage change across the power switch and adjusting the delay accordingly, the system achieves faster fault detection without sacrificing reliability.
2Reliability
If a fixed delay time is used in fault detection, then the circuit design is simple, but false detections occur due to inflexible timing that does not adapt to variations in power converter systems
Solution Approach 1:
The patent implements feedback by continuously monitoring the voltage across the power switch and using this information to adjust the delay time. The fault detection circuit receives feedback about the actual voltage transition characteristics and modifies its operation accordingly, eliminating false detections caused by fixed timing assumptions.
Solution Approach 2:
The system performs self-service by automatically adjusting its own delay parameters based on real-time measurements of the power switch behavior. The fault detection circuit uses the voltage transition information from the power switch itself to determine the appropriate delay time, making the system adaptive without requiring external calibration.
3Speed
If the fault detection compares voltage immediately after switch activation, then detection is fast, but false alarms occur due to transient voltage effects before the transistor stabilizes
Solution Approach 1:
The patent applies preliminary action by introducing a delay period that allows the power switch voltage to stabilize before fault detection begins. This preliminary waiting period eliminates transient effects that would cause false alarms, while the delay is optimized to be as short as possible to maintain fast detection capability.
Data Source
AI summary
An electronic circuit comprises a power switch circuit and a fault detection circuit. The power switch circuit includes a transistor. The fault detection circuit includes a first comparator circuit configured to compare a monitored voltage of the transistor to a detection threshold voltage and produce an indication of a circuit fault according to the comparing, and a delay circuit configured to delay the comparing by the first comparator circuit according to slew rate of the monitored voltage.