Adaptive On-Time DC-to-DC Buck Regulator With Phase-Locked Loop
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Solution Overview
Problem
Adaptive on-time buck regulators experience significant variations in switching frequencies due to process variations such as on-resistance of field-effect transistors, comparator mismatch, offset, and speed, leading to instability in voltage regulation.
Innovation Solution
The implementation of a voltage regulator circuit with a phase-lock loop (PLL) that generates an error signal representing the phase difference between a reference clock signal and the pulse-width modulated signal, ensuring stable switching frequencies by locking the rising edge of the timing signal to the clock reference signal, and using an adaptive on-time circuit with adjustable current sources to control on-times of the PWM signal based on output voltage and error signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If adaptive on-time control is used to achieve fast transient response, then transient response speed is improved, but switching frequency stability deteriorates due to process variations
Solution Approach 1:
The patent implements a phase-lock loop (PLL) that continuously monitors the phase difference between the PWM signal and a reference clock signal, then feeds back an error signal to adjust the PWM generation. This feedback mechanism dynamically compensates for process variations, maintaining stable switching frequency while preserving the fast transient response characteristics of adaptive on-time control.
Solution Approach 2:
The patent changes the control parameter from direct on-time adjustment to phase-difference-based adjustment. By using the phase difference between PWM and reference clock as the control parameter, the system can adaptively adjust the PWM duty cycle while maintaining a constant switching frequency, thus resolving the contradiction between fast transient response and frequency stability.
2Ease of manufacture
If process variations are tolerated to simplify manufacturing, then manufacturing complexity is reduced, but voltage regulation precision deteriorates
Solution Approach 1:
The phase-lock loop continuously monitors switching frequency deviations caused by process variations and feeds back error signals to correct them. This feedback mechanism compensates for manufacturing tolerances in components such as comparators and transistors, maintaining precise voltage regulation without requiring high-precision manufacturing.
Solution Approach 2:
The system uses its own switching frequency as the reference for the PLL, creating a self-correcting mechanism. The PLL automatically adjusts the PWM signal to maintain the desired switching frequency despite process variations, enabling the regulator to self-compensate for manufacturing imperfections.
Data Source
AI summary
Voltage regulator circuits and methods therefor provided. In some embodiments, a voltage regulator circuit comprises: a first switch coupled to a power input; a second switch coupled to the first switch; a switching node between the first switch and the second switch; an inductor coupled between the switching node and an output node; a capacitor coupled between the output node and ground; a driver configured to operate the first and second switches according to a pulse-width-modulated (PWM) signal; a PWM circuit configured to generate the PWM signal based on at least an error signal; and a phase detector configured to generate the error signal based on a phase difference between the PWM signal and a clock reference signal.