Adaptive Buffer Device Dynamic Entry Reconfiguration
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Solution Overview
Problem
Conventional buffer devices face inefficiencies in data transmission due to limited address merging capabilities and wasteful storage usage, especially when data addresses are not consecutive, leading to high data volumes over the system bus and suboptimal storage space utilization.
Innovation Solution
An adaptive buffer device with a control unit that dynamically adjusts entry status between normal and transformed modes, allowing flexible reconfiguration of address fields and record blocks to accommodate non-consecutive addresses, enabling efficient data merging and storage optimization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the storage width of each data entry is expanded to four words to accommodate non-consecutive addresses, then the probability of merging data with non-consecutive addresses increases, but storage space is wasted when data entries only record a single item of data
Solution Approach 1:
The buffer device dynamically adjusts the storage width of data entries based on the address pattern of incoming data. When data with consecutive addresses is detected, the buffer uses a compact storage mode; when non-consecutive addresses are detected, it expands to a wider storage mode. This dynamic adaptation allows the buffer to merge data with non-consecutive addresses while minimizing storage space waste by only expanding when necessary.
2Loss of substance
If write merge is performed only when addresses are ascendingly consecutive, then the system bus data transmission is reduced, but the probability of performing write merge is low
Solution Approach 1:
The buffer device changes the address comparison parameter from requiring strict ascending consecutiveness to allowing non-consecutive addresses with predictable patterns. By analyzing address patterns and identifying predictable non-consecutive sequences, the buffer can perform write merge on a broader range of address patterns, increasing merge probability while still reducing system bus data transmission volume.
3Device complexity
If each data entry stores only one item of data, then the address structure is simple, but write merge is possible only when addresses are ascendingly consecutive
Solution Approach 1:
The buffer device designs data entries with multi-functionality, where each entry can operate in different modes: a compact mode for consecutive addresses and an expanded mode for non-consecutive addresses. This universal design allows the same entry structure to handle both cases, maintaining simplicity for consecutive addresses while gaining the capability to handle non-consecutive addresses when needed, thus improving write merge capability without permanently increasing complexity.
Data Source
AI summary
An adaptive buffer device includes a plurality of entries each including an address field and a record block, and a control unit for selectively setting each entry to one of a normal status and a transformed status. When the control unit sets a first one of the entries to the normal status, the address field thereof records a first address, and the record block thereof records data corresponding to the first address and data corresponding to addresses adjacent to the first address. When the control unit sets a second one of the entries to the transformed status, the control unit reconfigures the address field and the record block thereof into a plurality of units, each of which includes a second address, data corresponding to the second address, and data corresponding to addresses adjacent to the second address. In addition, an adaptive buffer method is also disclosed.