Adaptive Buffer Amplifier Current Control for Variable Loads

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Solution Overview

Problem

Legacy reference buffer circuitry faces inefficiencies due to oversized current sources that must handle a wide range of load currents, leading to power wastage and voltage output glitches caused by varying transistor gate voltages.

Innovation Solution

A buffer amplifier arrangement featuring a programmable variable current source that adapts to different load configurations and modulator modes, ensuring that transistors operate with consistent current density and minimizing chopping-induced glitches.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a fixed current source is sized for maximum output load current, then the circuit can handle all load configurations, but power wastage increases and voltage output glitches occur due to varying transistor gate voltages

Engineering Contradiction:
Improveload configuration adaptabilityVSAvoidpower wastage
Core Design Contradiction:
Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent applies dynamics by replacing the fixed current source with a programmable current source that can dynamically adjust its output current based on the actual load configuration. The current source is controlled by a modulator mode bus that indicates the number of downstream ADCs and their configuration, allowing the circuit to adapt its current output in real-time rather than being sized for the worst-case scenario.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of the current source from a fixed value to a programmable value. The current source can be programmed to output different current levels depending on the load configuration, thereby optimizing power consumption for each operating mode while maintaining the ability to handle all load configurations.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If a fixed current source is sized for maximum output load current, then the circuit can handle all load configurations, but voltage output glitches occur due to varying transistor gate voltages

Engineering Contradiction:
Improveload configuration adaptabilityVSAvoidoutput voltage stability
Core Design Contradiction:
Adaptability or versatilityVSStability of the object's composition

Solution Approach 1:

The patent applies dynamics by replacing the fixed current source with a programmable current source that can dynamically adjust its output current based on the actual load configuration. The current source is controlled by a modulator mode bus that indicates the number of downstream ADCs and their configuration, allowing the circuit to adapt its current output in real-time rather than being sized for the worst-case scenario.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses feedback by monitoring the modulator mode bus that indicates the actual load configuration and using this information to programmatically adjust the current source output. This closed-loop approach ensures that the current source provides the appropriate current for each operating mode, preventing voltage glitches caused by mismatched current levels.

Inventive Principle:
Principle #23Feedback

3Loss of energy

If a PMOS device supplies variable load current, then power efficiency improves, but high frequency power supply noise couples strongly to the output due to the Miller capacitor

Engineering Contradiction:
Improvepower efficiencyVSAvoidpower supply noise coupling
Core Design Contradiction:
Loss of energyVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an intermediary element - a buffer stage - between the PMOS device and the Miller capacitor. This buffer stage isolates the PMOS device from the high-frequency noise coupling path created by the Miller capacitor, allowing the PMOS to efficiently supply variable current while preventing noise from being coupled to the output.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Loss of energy

If the current source is reduced for sub-optimal modulator modes, then power efficiency improves, but the circuit cannot handle maximum load current requirements

Engineering Contradiction:
Improvepower efficiencyVSAvoidload current handling capability
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent applies dynamics by replacing the fixed current source with a programmable current source that can dynamically adjust its output current based on the actual load configuration. The current source is controlled by a modulator mode bus that indicates the number of downstream ADCs and their configuration, allowing the circuit to adapt its current output in real-time rather than being sized for the worst-case scenario.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent makes the current source universal by designing it to handle multiple operating modes. The programmable current source can be configured to provide different current levels appropriate for different load configurations, making it suitable for all modulator modes from low-power to maximum performance modes, thereby eliminating the need for mode-specific current sources.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP4502755A1Buffer circuit
Publication Date: 2025.02.05 ANALOG DEVICES INT UNLTD CO
  • EP4502755A1 patent drawingFigure 1
  • EP4502755A1 patent drawingFigure 2
  • EP4502755A1 patent drawingFigure 3

AI summary

The present disclosure provides a buffer amplifier arrangement (3) that seeks to find a solution to varying load configurations on an output of the buffer. To address this issue a current source that supplies an output of the buffer is divided into a fixed current source (I2) and a variable current source (I3) that provides current for the variable load (RLOAD). The variable current source (I3) is a programmable current source that can be varied based on the associated modulator mode bus. As such, the current source is adaptive to multiple differing loads. Further, this reduces the power inefficiency in the buffer, as there is less power wastage during 'sub-optimal' modulator modes. Moreover, since the adaptive current source can match the modulator modes the glitch effect will be greatly reduced resulting in a more stable output voltage due to power supply changes.