Adaptive Cache Voltage Control for Power and Reliability
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Solution Overview
Problem
Conventional SRAM cache systems face reliability issues due to process variations, where the driving voltage may fall below the minimum required to maintain memory cell states, leading to data loss, and result in high power consumption as all cells are maintained at a single minimum voltage level regardless of usage.
Innovation Solution
Adaptive voltage control based on cache usage amounts, allowing the voltage to be varied between minimum and sub-minimum levels to maintain reliable operation, with memory access directed to non-failing portions of the cache, and remapping failing cells to non-failing cells to ensure data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the driving voltage of the cache is reduced below Vmin to save power, then power consumption decreases, but the state of memory cells cannot be maintained reliably leading to data loss
Solution Approach 1:
The cache is divided into multiple segments or portions, each capable of operating at different voltage levels. The system identifies and isolates specific cache portions that can tolerate sub-Vmin operation, allowing other portions to maintain full voltage for reliability. This segmentation enables selective power reduction without compromising overall cache integrity.
Solution Approach 2:
Different voltage levels are applied to different portions of the cache based on their individual characteristics and usage patterns. Rather than uniformly reducing voltage across the entire cache, the system applies sub-Vmin operation only to specific cache portions where it is safe to do so, maintaining local quality and reliability where needed while reducing power consumption elsewhere.
2Reliability
If the driving voltage is maintained at Vmin across the entire cache, then memory cell state reliability is maintained, but power consumption increases significantly
Solution Approach 1:
The cache voltage levels are made dynamic rather than static. The system continuously monitors cache usage patterns, temperature, and error rates, adjusting voltage levels in real-time. When cache portions are idle or showing no errors, their voltage is reduced to sub-Vmin levels. When activity increases or errors are detected, voltage is restored to Vmin, creating a dynamic power management system that adapts to changing conditions.
Solution Approach 2:
The system changes the operating voltage parameter of cache portions based on monitored conditions. By detecting cache usage amounts and operational status, the system dynamically adjusts the voltage parameter from Vmin to sub-Vmin levels and vice versa, optimizing the balance between power consumption and reliability based on actual operational needs.
3Use of energy by moving object
If sub-Vmin voltage is applied to reduce power, then power consumption decreases, but cache usage capacity must be reduced to maintain reliability
Solution Approach 1:
The system implements feedback mechanisms that monitor cache operation at sub-Vmin voltage levels, detecting errors, usage patterns, and performance metrics. Based on this feedback, the system dynamically adjusts which cache portions operate at reduced voltage and which maintain full voltage. This feedback loop enables the system to maximize cache usage at sub-Vmin levels while maintaining reliability, automatically scaling cache capacity up or down based on actual operational success.
Data Source
AI summary
Systems, apparatuses and methods of adaptively controlling a cache operating voltage are provided that comprise receiving indications of a plurality of cache usage amounts. Each cache usage amount corresponds to an amount of data to be accessed in a cache by one of a plurality of portions of a data processing application. The plurality of cache usage amounts are determining based on the received indications of the plurality of cache usage amounts. A voltage level applied to the cache is adaptively controlled based on one or more of the plurality of determined cache usage amounts. Memory access to the cache is controlled to be directed to a non-failing portion of the cache at the applied voltage level.