Adaptive Charge Balanced MOSFET With Segmented Gate Oxide
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Solution Overview
Problem
Conventional MOSFETs face challenges in achieving low on-state resistance with minimal increase in device capacitance and high breakdown voltages, especially at lower voltages, due to limitations in trench structures and thick oxide layers, which restrict switching frequencies and device performance.
Innovation Solution
The adaptive charge compensated MOSFET device incorporates field plate stacks with field plate regions and insulator regions between body and drain regions, allowing for thinner oxide layers and reduced device capacitance while maintaining high breakdown voltages, achieved through a specific doping profile and structure design that compensates for charge distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If thick oxide layers are used in trench MOSFET structures to achieve high breakdown voltages, then breakdown voltage is improved, but device capacitance increases and switching frequencies are restricted
Solution Approach 1:
The gate structure is segmented into multiple gate regions (first gate region, second gate region, third gate region) with different oxide thicknesses. The first gate region has a first oxide thickness, the second gate region has a second oxide thickness greater than the first, and the third gate region has a third oxide thickness greater than the second. This segmentation allows different portions of the gate to have optimized oxide thicknesses for their specific functional requirements, achieving high breakdown voltage where needed while minimizing overall device capacitance.
2Reliability
If conventional trench structures are used to reduce on-state resistance, then on-state resistance is improved, but device capacitance increases and switching frequencies are restricted
Solution Approach 1:
Different regions of the gate structure are assigned different oxide thicknesses based on their local functional requirements. The first gate region (where high electric field termination is needed) has a thinner oxide layer to minimize capacitance, while the second and third gate regions (where voltage blocking is critical) have progressively thicker oxide layers to ensure high breakdown voltage. This local optimization of oxide thickness allows the device to achieve low on-state resistance without the penalty of uniformly thick oxide layers that would increase overall device capacitance and limit switching frequency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances breakdown voltage and reduces on-state resistance without increasing device capacitance, enabling higher switching frequencies and improved performance at lower voltages compared to conventional MOSFETs.
Implementation Method 1
When the potential of the gate regions 115, with respect to the source regions 110, is increased above the threshold voltage of the device 100, a conducting channel is induced in the body region 125 along the periphery of the gate insulator regions 120
Implementation Method 2
Each gate insulator region 120 surrounds a corresponding gate region 115, electrically isolating the gate region 115 from the surrounding regions 110, 125, 130
Implementation Method 3
The source regions 110 and the drain region 135 are heavily n-doped (N+) semiconductor, such as silicon doped with phosphorous or arsenic. The drift region 130 is lightly n-doped (N-) semiconductor, such as silicon doped with phosphorous or arsenic. The body regions 125 are p-doped (P) semiconductor, such as silicon doped with boron
Data Source
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AI summary
An adaptive charge balanced MOSFET device includes a field plate stacks, a gate structure, a source region, a drift region and a body region. The gate structure includes a gate region surrounded by a gate insulator region. The field plate stack includes a plurality of field plate insulator regions, a plurality of field plate regions, and a field ring region. The plurality of field plates are separated from each other by respective field plate insulators. The body region is disposed between the gate structure, the source region, the drift region and the field ring region. Each of two or more field plates are coupled to the field ring.