Adaptive Chiplet Composability for CPU and DPU Resource Balancing
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Solution Overview
Problem
Current acceleration devices (e.g., input/output devices) such as Data Processing Units (DPUs) are dimensioned independently from host processing capabilities, leading to inefficiencies such as wasted power and space due to mismatched compute processing needs for different workloads.
Innovation Solution
A processor system that integrates core complex chiplets with an accelerator chiplet, allowing dynamic assignment of chiplets to form either a central processing unit (CPU) or an input/output device based on workload demands, using a composable agent to reassign resources as needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the DPU is dimensioned independently from host processing capabilities, then the DPU can handle various workloads, but it leads to wasted power and space due to mismatched compute processing needs
Solution Approach 1:
The system dynamically reassigns chiplets between CPU and IO device based on workload demands. The composable agent monitors compute requirements and reallocates resources in real-time, transforming the static hardware configuration into a dynamic one that adapts to changing workload conditions, thereby reducing power waste while maintaining versatility
Solution Approach 2:
The processing system is segmented into independent chiplets that can be individually assigned to different functions. By dividing the system into separatable units (chiplets) rather than a monolithic DPU, the system can allocate only the necessary compute resources to handle specific workloads, reducing overall power consumption while maintaining adaptability
2Adaptability or versatility
If the DPU is dimensioned independently from host processing capabilities, then the DPU can be configured for specific tasks, but it results in space waste in the computing system
Solution Approach 1:
The chiplets serve multiple functions by being reassigned between CPU and IO device roles based on workload requirements. Instead of dedicating fixed space to a full-featured DPU, the same physical chiplets can universally serve as either CPU cores or IO processing units, reducing total space occupation while maintaining task configuration flexibility
Solution Approach 2:
The hardware configuration is made dynamic through runtime reassignment of chiplets. The composable agent enables the system to transform hardware architecture on-the-fly, allowing the same physical space to serve different computational needs based on workload demands, thereby reducing wasted space while preserving adaptability
3Reliability
If the DPU has much more compute processing than required, then it can handle peak workloads, but it wastes power and space
Solution Approach 1:
The system uses dynamic reassignment to match compute resources with actual workload demands in real-time. During peak workloads, additional chiplets are allocated to the IO device to handle the increased load, while during normal operations, fewer chiplets are assigned, reducing power consumption. This dynamic adjustment eliminates the need for over-provisioning
Solution Approach 2:
The system changes operational parameters by reconfiguring the number and assignment of active chiplets based on workload intensity. The composable agent adjusts the operational state of the system by modifying resource allocation parameters, enabling the same hardware to efficiently handle both peak and normal workloads without constant power waste
4Loss of energy
If the DPU has not enough compute processing, then it saves power and space, but it becomes a bottleneck
Solution Approach 1:
The system dynamically scales compute resources allocated to the IO device based on workload demands. When workloads increase and the IO device approaches capacity, the composable agent automatically reassigns additional chiplets to prevent bottlenecks, maintaining high productivity while keeping power consumption efficient during normal operations
Solution Approach 2:
The composable agent implements feedback control by monitoring the compute requirements and performance of the IO device. Based on this feedback, the agent adjusts resource allocation to prevent bottlenecks, ensuring that the system maintains adequate processing throughput while avoiding unnecessary power consumption when full capacity is not needed
Data Source
AI summary
Embodiments herein describe a processor system that includes an integrated, adaptive accelerator. In one embodiment, the processor system includes multiple core complex chiplets that each contain one or processing cores for a host CPU. In addition the processor system includes an accelerator chiplet. The processor system can assign one or more of the core complex chiplets to the accelerator chiplet to form an IO device while the remaining core complex chiplets form the CPU for the host. In this manner, rather than the accelerator and the CPU having independent computer resources, the accelerator can be integrated into the processor system of the host so that hardware resources can be divided between the CPU and the accelerator depending on the needs of the particular application(s) executed by the host.