Adaptive Clock Generation for Critical Path Delay Tracking
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Solution Overview
Problem
Digital circuits operating at sub/near-threshold voltages face performance variations due to process, voltage, and temperature fluctuations, leading to inefficient energy consumption and potential malfunctions, as the fixed clock period often results in idle states and increased energy leakage.
Innovation Solution
An adaptive clock generating apparatus and method that dynamically adjusts the clock period based on the critical path delay of a synchronous circuit using a fixed frequency divider, replica, counter, and variable frequency divider to minimize energy consumption and prevent synchronization errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the clock period is stretched to the worst case critical path delay, then the circuit malfunction is prevented, but the energy consumption greatly increases
Solution Approach 1:
The patent implements a dynamic clock period adjustment mechanism that adapts the clock period based on the actual critical path delay measured during circuit operation. The system uses a delay measurement circuit to continuously monitor the critical path delay and adjusts the clock period dynamically to match the actual delay requirements, avoiding the static worst-case assumption. This resolves the contradiction by making the clock period flexible rather than fixed, ensuring reliable operation while minimizing energy consumption.
Solution Approach 2:
The system changes the clock period parameter based on measured critical path delay values. By using a delay measurement circuit to obtain actual delay data and adjusting the clock period accordingly, the system transitions from a fixed worst-case parameter to a dynamically optimized parameter. This parameter adaptation resolves the contradiction between reliability and energy consumption by setting the clock period to the minimum necessary value for reliable operation.
2Reliability
If the clock period is set to the worst case, then the circuit malfunction is prevented, but the circuits remain in idle state for most time
Solution Approach 1:
The patent implements a dynamic clock period adjustment mechanism that adapts the clock period based on the actual critical path delay measured during circuit operation. The system uses a delay measurement circuit to continuously monitor the critical path delay and adjusts the clock period dynamically to match the actual delay requirements, avoiding the static worst-case assumption. This resolves the contradiction by making the clock period flexible rather than fixed, ensuring reliable operation while minimizing energy consumption.
Solution Approach 2:
The system uses the circuit's own operational characteristics to determine the appropriate clock period. The delay measurement circuit measures the actual critical path delay of the circuit itself, and this measured value directly controls the clock period adjustment. This self-service approach resolves the contradiction by using the circuit's actual performance data to optimize its own timing, eliminating unnecessary idle time while maintaining reliability.
3Reliability
If the clock period is stretched to the worst case, then the circuit malfunction is prevented, but the active leakage current increases energy consumption
Solution Approach 1:
The patent implements a dynamic clock period adjustment mechanism that adapts the clock period based on the actual critical path delay measured during circuit operation. The system uses a delay measurement circuit to continuously monitor the critical path delay and adjusts the clock period dynamically to match the actual delay requirements, avoiding the static worst-case assumption. This resolves the contradiction by making the clock period flexible rather than fixed, ensuring reliable operation while minimizing energy consumption.
Solution Approach 2:
The system changes the clock period parameter based on measured critical path delay values. By using a delay measurement circuit to obtain actual delay data and adjusting the clock period accordingly, the system transitions from a fixed worst-case parameter to a dynamically optimized parameter. This parameter adaptation resolves the contradiction between reliability and energy consumption by setting the clock period to the minimum necessary value for reliable operation.
4Reliability
If the clock period is stretched to the worst case, then the circuit malfunction is prevented, but the time and resources are wasted
Solution Approach 1:
The patent implements a dynamic clock period adjustment mechanism that adapts the clock period based on the actual critical path delay measured during circuit operation. The system uses a delay measurement circuit to continuously monitor the critical path delay and adjusts the clock period dynamically to match the actual delay requirements, avoiding the static worst-case assumption. This resolves the contradiction by making the clock period flexible rather than fixed, ensuring reliable operation while minimizing energy consumption.
Solution Approach 2:
The system uses the circuit's own operational characteristics to determine the appropriate clock period. The delay measurement circuit measures the actual critical path delay of the circuit itself, and this measured value directly controls the clock period adjustment. This self-service approach resolves the contradiction by using the circuit's actual performance data to optimize its own timing, eliminating unnecessary idle time while maintaining reliability.
Data Source
AI summary
An adaptive clock generating apparatus is provided. The apparatus includes a fixed frequency divider, a replica, a counter, a variable frequency divider. The adaptive clock generating apparatus generates a clock whose period varies along with changes in the critical path delay of a synchronous circuit.