Adaptive Clock Circuit for RF Interference Detection and Mitigation
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Solution Overview
Problem
Computer platforms face performance degradation due to radio frequency interference (RFI) from sources like Wi-Fi and cellphone signals, leading to issues such as display flickering and system crashes, and existing mitigation methods like shielding and phase-locked loops (PLLs) increase costs and power consumption.
Innovation Solution
An adaptive RFI mitigation architecture that engages mitigation circuitry only when necessary, using an adaptive clock generator with a low-pass filter and digital signal generators to detect and mitigate RFI by adjusting clock generation based on jitter and duty cycle monitoring, minimizing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If shielding and phase-locked loops (PLLs) are used to mitigate RFI, then RFI protection is improved, but power consumption and cost increase
Solution Approach 1:
The patent implements a dynamic RFI mitigation system that adapts its protection level based on detected RFI conditions. The system transitions between different operational states (normal operation, RFI detection, mitigation activation) rather than maintaining constant protection, thereby reducing overall power consumption while ensuring reliability when needed.
Solution Approach 2:
The system uses its own clock circuitry to detect RFI conditions and automatically activates mitigation measures without external intervention. The self-monitoring and self-protection mechanism eliminates the need for continuous external control signals, reducing power overhead associated with constant monitoring and control.
2Reliability
If shielding and phase-locked loops (PLLs) are used to mitigate RFI, then RFI protection is improved, but device complexity and cost increase
Solution Approach 1:
The RFI mitigation system is divided into distinct functional modules: RFI detection module, state machine controller, and mitigation activation module. This segmentation allows each component to perform its specific function efficiently and enables independent optimization of each module, reducing overall system complexity while maintaining effective RFI protection.
3Stability of the object's composition
If continuous RFI mitigation is applied, then clock signal stability is improved, but power consumption increases
Solution Approach 1:
The system employs periodic sampling of the clock signal to detect RFI conditions rather than continuous monitoring. The state machine controller periodically evaluates jitter and duty cycle parameters, activating mitigation only when RFI is detected. This periodic approach maintains clock signal stability when needed while dramatically reducing power consumption during normal operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively reduces RFI impact on clock circuits with minimal power increase, avoiding additional costs and complexity, and maintaining optimal performance in the absence of RFI.
Implementation Method 1
a low-pass filter circuit coupled to an output terminal of the oscillator circuit
Data Source
AI summary
An apparatus includes an oscillator circuit and a low-pass filter circuit coupled to an output terminal of the oscillator circuit. The apparatus further includes a first digital signal generator coupled to at least one of an output terminal of the low-pass filter circuit and the output terminal of the oscillator circuit and a second digital signal generator coupled to at least one of the output terminal of the low-pass filter circuit and the output terminal of the oscillator circuit. The second digital signal generator generates a second digital clock signal based on a non-differential signal output of the oscillator circuit. The apparatus further includes a radio frequency interference (RFI) detection circuit coupled to the first digital signal generator and the second digital signal generator. The RFI detection circuit detects RFI associated with the non-differential signal output of the oscillator circuit.