Adaptive Clock Control for Microprocessor Voltage Droop

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Solution Overview

Problem

Microprocessors face performance degradation and potential failure due to sudden voltage changes, which cause noise in the voltage supply, and conventional methods to mitigate this often require maintaining a higher voltage that reduces performance.

Innovation Solution

A system that includes a voltage detector with a low-pass filter and a controller to adjust the clock frequency based on detected voltage droop events, reducing the frequency during droop events and incrementally increasing it when the voltage returns to normal, thereby mitigating voltage droop and improving tolerance to supply noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a higher voltage is maintained to compensate for voltage droop events, then reliability is improved, but performance deteriorates

Engineering Contradiction:
Improvemicroprocessor reliabilityVSAvoidmicroprocessor performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies dynamics by making the clock frequency adjustable and adaptive rather than fixed. The system dynamically changes clock frequency based on real-time voltage conditions detected by the voltage detector, allowing the microprocessor to operate at higher frequencies when voltage is stable and reduce frequency when voltage droop occurs, thus avoiding the need to permanently operate at higher voltage levels

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements feedback through a voltage detector that continuously monitors voltage levels and provides information to the clock controller. This closed-loop feedback mechanism enables the system to automatically adjust clock frequency in response to detected voltage droop events, ensuring reliability while maintaining optimal performance during normal operation

Inventive Principle:
Principle #23Feedback

2Reliability

If clock frequency is reduced during voltage droop events, then reliability is improved, but productivity deteriorates

Engineering Contradiction:
Improvemicroprocessor reliabilityVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies periodic action through incremental frequency adjustment. Rather than making large sudden changes, the system adjusts clock frequency in small incremental steps during voltage droop events, allowing smooth transitions that maintain stability while minimizing performance impact. The frequency is incrementally increased back to normal levels once voltage conditions improve

Inventive Principle:
Principle #19Periodic action

3Use of energy by moving object

If voltage margin is reduced to allow lower operating voltage, then energy efficiency is improved, but tolerance to voltage noise deteriorates

Engineering Contradiction:
Improvepower consumptionVSAvoidtolerance to voltage noise
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent applies preliminary action by detecting voltage droop events before they cause microprocessor failure. The voltage detector continuously monitors voltage levels and triggers clock frequency reduction in advance, preventing voltage noise from causing errors or failures. This proactive approach allows the system to operate with smaller voltage margins while maintaining reliability

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the microprocessor's tolerance to voltage noise, reduces the required voltage margin, and allows for lower operating voltage while maintaining or improving performance.

Implementation Method 1

a voltage detector comprising a low-pass filter, the voltage detector being configured to detect a relative voltage droop associated with a certain amount of voltage supply noise in the system based on a comparison of (a) a voltage associated with the microprocessor with (b) a low-pass filtered version of the voltage associated with the microprocessor

Methodology Applied
Scientific EffectLow-pass filtering: Filter (electronic)

Data Source

PatentEP3510468B1System and method for clock control based on voltage associated with a microprocessor
Publication Date: 2024.10.02 AMPERE COMPUTING LLC
  • EP3510468B1 patent drawingFigure 1
  • EP3510468B1 patent drawingFigure 2
  • EP3510468B1 patent drawingFigure 3

AI summary

ABSTRACT Various aspects provide for mitigating voltage droop associated with a microprocessor (e.g., by controlling a clock associated with the microprocessor). For example, a system can include a microprocessor and a controller. The microprocessor can receive a clock provided by a clock buffer. The controller can control frequency of the clock provided by the clock buffer based on a voltage associated with the microprocessor. In an aspect, the controller can reduce the frequency of the clock in response to a determination that the voltage satisfies a defined criterion. Additionally, the controller can incrementally increase the frequency of the clock in response to another determination that the voltage satisfies another defined criterion after satisfying the defined criterion