Adaptive Code Rate Programming for Memory Erasing Unit Lifespan
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Solution Overview
Problem
Rewritable non-volatile memory modules face reduced reliability and eventual discard due to increasing bit error rates from repeated erasing cycles, limiting their lifespan and usage in portable devices.
Innovation Solution
A method for programming data in rewritable non-volatile memory modules that adapts the code rate based on the type of physical erasing unit, using a higher code rate for units with higher bit error rates to extend their usability by effectively managing error correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If a physical erasing unit is repeatedly erased to extend its usage, then the erasing count increases, but the bit error rate gradually increases until the block cannot be used
Solution Approach 1:
The patent changes the code rate parameter dynamically based on the erasing count of the physical erasing unit. When the erasing count exceeds a threshold indicating increased bit error rate, the system switches from a first code rate to a second code rate with stronger error correction capability, thereby maintaining data reliability while extending the usable lifespan of the memory block.
Solution Approach 2:
The system dynamically adjusts the error correction strategy by switching between different code rates based on the current state of the physical erasing unit. This dynamic adaptation allows the system to optimize between storage capacity and data reliability at different stages of the memory block's lifecycle.
2Reliability
If a higher code rate is used for error correction, then data reliability is improved, but the storage capacity is reduced due to more parity bits
Solution Approach 1:
The patent employs variable code rates that are selected based on the erasing count of the physical erasing unit. For blocks with low erasing counts, a first code rate with higher storage capacity is used. For blocks with high erasing counts where bit error rate increases, a second code rate with stronger error correction is applied. This parameter adaptation resolves the contradiction by applying stronger error correction only when necessary.
Solution Approach 2:
Different error correction strengths are applied to different physical erasing units based on their individual wear states. Instead of uniformly applying strong error correction to all blocks (which would waste capacity), the system applies enhanced error correction locally only to blocks that have exceeded the erasing count threshold and exhibit higher bit error rates.
3Reliability
If physical erasing units with high bit error rates are discarded to maintain reliability, then data integrity is preserved, but the usable storage capacity decreases
Solution Approach 1:
Instead of discarding physical erasing units with high bit error rates, the patent changes the code rate parameter for these units. By switching to a second code rate with stronger error correction capability, the system maintains data integrity in previously unusable blocks, thereby expanding the usable storage capacity without compromising reliability.
Solution Approach 2:
The patent converts the harmful effect of high bit error rates in worn-out blocks into a benefit by automatically detecting these blocks and applying enhanced error correction. This transforms previously unreliable storage units into usable capacity, turning the problem of increased bit errors into an opportunity to extend usable storage life.
Data Source
AI summary
A method for programming data, a memory storage device and a memory control circuit unit are provided. The method includes: receiving a writing command which instructs to write data to a logical address belonging to a logical programming unit; if a physical erasing unit of a physical programming unit which the logical programming unit is mapped to is a first type physical erasing unit, programming the data and a parity code corresponding to the data into the physical programming unit according to a first code rate; and if the physical erasing unit is a second type physical erasing unit, programming the data and the parity code corresponding to the data into the physical programming unit according to a second code rate. The first code rate is higher than the second code rate. Therefore, the lifespan of the physical erasing unit having a higher bit error rate may be extended.