Adaptive CPU NUMA Scheduling for Virtual Machine Load Balancing
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Solution Overview
Problem
Existing NUMA scheduling policies face challenges in achieving optimal CPU utilization and memory locality, leading to high CPU contention and underutilization of resources due to rigid assignment of virtual CPUs and memory to specific NUMA nodes, which fails to efficiently manage short-term CPU imbalances and memory load balancing.
Innovation Solution
The proposed solution involves a flexible scheduling approach that evaluates and selects the optimal NUMA node for executing virtual CPUs based on memory access latency, CPU contention, and processing capabilities, allowing vCPUs to be assigned to different NUMA nodes to balance load and maximize resource utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If a hard NUMA policy assigns both vCPU and associated memory to a single NUMA home node, then memory access latency is reduced, but CPU contention increases and CPU utilization becomes suboptimal
Solution Approach 1:
The patent implements dynamic vCPU placement that allows virtual CPUs to migrate between NUMA nodes based on runtime conditions. The system monitors CPU contention levels and memory access patterns, then relocates vCPUs to optimize the balance between memory locality and CPU utilization. This dynamic approach replaces the static hard NUMA policy, enabling the system to adapt to changing workloads and prevent both high contention and underutilization.
Solution Approach 2:
The system changes the parameter of vCPU placement from fixed (hard NUMA policy) to flexible by introducing a placement score that evaluates multiple factors including memory access latency, CPU contention, and load balancing. This parameter change enables the scheduler to select optimal NUMA nodes dynamically, resolving the contradiction between maintaining low latency and achieving high utilization.
2Ease of operation
If NUMA scheduler reassigns home nodes to address long-term CPU imbalance, then CPU load balancing improves, but short-term CPU imbalances cannot be addressed frequently enough
Solution Approach 1:
The system performs preliminary evaluation of candidate NUMA nodes using a placement score that pre-calculates memory access costs and CPU contention levels. This allows the scheduler to make rapid placement decisions without extensive runtime optimization, enabling frequent adjustments to address short-term imbalances while maintaining good load balancing.
Solution Approach 2:
The patent implements a feedback mechanism where the system continuously monitors CPU contention and memory access patterns, then uses this information to adjust vCPU placement. The placement score incorporates real-time system state, allowing the scheduler to respond quickly to both short-term and long-term imbalances by migrating vCPUs to more suitable NUMA nodes.
3Loss of time
If hard NUMA policy places VMs in fixed size bins, then memory locality is optimized, but CPU contention becomes unbalanced across NUMA nodes
Solution Approach 1:
The system replaces the static bin-packing approach with dynamic vCPU placement that allows VMs to span multiple NUMA nodes when beneficial. The placement score evaluates whether keeping a vCPU on its home node or migrating it provides better overall system performance, enabling flexible load distribution that prevents both over-utilization and underutilization of NUMA nodes.
Solution Approach 2:
The patent changes the placement parameter from strict home-node assignment to a flexible score-based selection that considers memory access cost, CPU contention, and load balancing. This parameter change allows the system to optimize for both memory locality and CPU utilization balance by selecting the best NUMA node for each vCPU based on current system conditions.
Data Source
AI summary
Systems and methods for performing selection of non-uniform memory access (NUMA) nodes for mapping of virtual central processing unit (vCPU) operations to physical processors are provided. A CPU scheduler evaluates the latency between various candidate processors and the memory associated with the vCPU, and the size of the working set of the associated memory, and the vCPU scheduler selects an optimal processor for execution of a vCPU based on the expected memory access latency and the characteristics of the vCPU and the processors. The systems and methods further provide for monitoring system characteristics and rescheduling the vCPUs when other placements provide improved performance and efficiency.


